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Wed, 02 Sep 2026 21:46:41 -0700 (PDT) Received: from localhost.localdomain ([76.133.142.170]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1431994db8csm2337726c88.9.2026.09.02.21.46.40 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 02 Sep 2026 21:46:41 -0700 (PDT) From: 54weasels <54weasels@gmail.com> To: qemu-devel@nongnu.org Cc: laurent@vivier.eu, balaton@eik.bme.hu, 54weasels <54weasels@gmail.com> Subject: [PATCH v5 1/6] target/m68k: Add dummy CAAR register Date: Wed, 2 Sep 2026 21:45:14 -0700 Message-ID: <20260903044626.24453-2-54weasels@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260903044626.24453-1-54weasels@gmail.com> References: <20260903044626.24453-1-54weasels@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=54weasels@gmail.com; helo=mail-pj1-x1035.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Why this change is made & How it will be used: The Sun-3 ROM expects the Cache Control Register (CAAR) to exist on the 68020. Reading/writing this register currently aborts QEMU. This patch provides a dummy implementation that simply ignores writes and returns 0 on reads, allowing the ROM to continue booting. Impact on existing functionality: No impact on existing targets. ColdFire and Mac targets do not access CAAR in a way that currently aborts, and providing a safe dummy implementation ensures robustness across M68k boards. Signed-off-by: 54weasels <54weasels@gmail.com> --- target/m68k/helper.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 5f91d206f5..68f523ea84 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -281,8 +281,10 @@ void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val) return; } break; - /* Unimplemented Registers */ + /* Dummy implementation for CAAR */ case M68K_CR_CAAR: + return; + /* Unimplemented Registers */ case M68K_CR_PCR: case M68K_CR_BUSCR: cpu_abort(env_cpu(env), @@ -385,8 +387,10 @@ uint32_t HELPER(m68k_movec_from)(CPUM68KState *env, uint32_t reg) return env->mmu.ttr[M68K_DTTR1]; } break; - /* Unimplemented Registers */ + /* Dummy implementation for CAAR */ case M68K_CR_CAAR: + return 0; + /* Unimplemented Registers */ case M68K_CR_PCR: case M68K_CR_BUSCR: cpu_abort(env_cpu(env), "Unimplemented control register read 0x%x\n", -- 2.50.1 (Apple Git-155)