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([180.150.112.50]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1431990a39bsm2770619c88.3.2026.09.02.22.52.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Sep 2026 22:52:43 -0700 (PDT) From: Joel Stanley To: Alistair Francis , Daniel Henrique Barboza Cc: Weiwei Li , Liu Zhiwei , Chao Liu , Nicholas Piggin , Anirudh Srinivasan , Michael Ellerman , Portia Stephens , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-riscv@nongnu.org, qemu-devel@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v3 04/16] hw/intc/riscv_aplic: Take a MemoryRegion for the created device Date: Thu, 3 Sep 2026 15:21:18 +0930 Message-ID: <20260903055131.257903-5-joel@jms.id.au> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260903055131.257903-1-joel@jms.id.au> References: <20260903055131.257903-1-joel@jms.id.au> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=joel.stan@gmail.com; helo=mail-pl1-x631.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.001, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Sender: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org riscv_aplic_create() maps the device it creates into system_memory, which prevents its use by SoCs that map devices into their own memory container. Add a MemoryRegion parameter and map the device into it instead of calling sysbus_mmio_map(). The mapping still only happens when the APLIC is emulated. All callers pass system_memory, so there is no change in behaviour. Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Joel Stanley --- include/hw/intc/riscv_aplic.h | 7 ++++--- hw/intc/riscv_aplic.c | 10 ++++++---- hw/riscv/aia.c | 8 ++++---- hw/riscv/cps.c | 6 ++++-- hw/riscv/xiangshan_kmh.c | 6 ++++-- 5 files changed, 22 insertions(+), 15 deletions(-) diff --git a/include/hw/intc/riscv_aplic.h b/include/hw/intc/riscv_aplic.h index c7a4d4ad0172..62d2b33ade61 100644 --- a/include/hw/intc/riscv_aplic.h +++ b/include/hw/intc/riscv_aplic.h @@ -80,8 +80,9 @@ bool riscv_is_kvm_aia_aplic_imsic(bool msimode); bool riscv_use_emulated_aplic(bool msimode); void riscv_aplic_set_kvm_msicfgaddr(RISCVAPLICState *aplic, hwaddr addr); -DeviceState *riscv_aplic_create(hwaddr addr, hwaddr size, - uint32_t hartid_base, uint32_t num_harts, uint32_t num_sources, - uint32_t iprio_bits, bool msimode, bool mmode, DeviceState *parent); +DeviceState *riscv_aplic_create(MemoryRegion *container, + hwaddr addr, hwaddr size, uint32_t hartid_base, uint32_t num_harts, + uint32_t num_sources, uint32_t iprio_bits, bool msimode, bool mmode, + DeviceState *parent); #endif diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c index 84606e9f3d88..d8e25bfda14b 100644 --- a/hw/intc/riscv_aplic.c +++ b/hw/intc/riscv_aplic.c @@ -1109,9 +1109,10 @@ void riscv_aplic_add_child(DeviceState *parent, DeviceState *child) /* * Create APLIC device. */ -DeviceState *riscv_aplic_create(hwaddr addr, hwaddr size, - uint32_t hartid_base, uint32_t num_harts, uint32_t num_sources, - uint32_t iprio_bits, bool msimode, bool mmode, DeviceState *parent) +DeviceState *riscv_aplic_create(MemoryRegion *container, + hwaddr addr, hwaddr size, uint32_t hartid_base, uint32_t num_harts, + uint32_t num_sources, uint32_t iprio_bits, bool msimode, bool mmode, + DeviceState *parent) { DeviceState *dev = qdev_new(TYPE_RISCV_APLIC); uint32_t i; @@ -1137,7 +1138,8 @@ DeviceState *riscv_aplic_create(hwaddr addr, hwaddr size, sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); if (riscv_use_emulated_aplic(msimode)) { - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); + memory_region_add_subregion(container, addr, + sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); if (!msimode) { for (i = 0; i < num_harts; i++) { diff --git a/hw/riscv/aia.c b/hw/riscv/aia.c index eae7638f972b..56fc06453321 100644 --- a/hw/riscv/aia.c +++ b/hw/riscv/aia.c @@ -72,8 +72,8 @@ DeviceState *riscv_create_aia(MemoryRegion *container, if (!kvm_enabled()) { /* Per-socket M-level APLIC */ - aplic_m_dev = riscv_aplic_create(aplic_m->base + - socket * aplic_m->size, + aplic_m_dev = riscv_aplic_create(container, + aplic_m->base + socket * aplic_m->size, aplic_m->size, (msimode) ? 0 : base_hartid, (msimode) ? 0 : hart_count, @@ -83,8 +83,8 @@ DeviceState *riscv_create_aia(MemoryRegion *container, } /* Per-socket S-level APLIC */ - aplic_s_dev = riscv_aplic_create(aplic_s->base + - socket * aplic_s->size, + aplic_s_dev = riscv_aplic_create(container, + aplic_s->base + socket * aplic_s->size, aplic_s->size, (msimode) ? 0 : base_hartid, (msimode) ? 0 : hart_count, diff --git a/hw/riscv/cps.c b/hw/riscv/cps.c index 5cfb54aa27d2..d2fd9638a08d 100644 --- a/hw/riscv/cps.c +++ b/hw/riscv/cps.c @@ -135,14 +135,16 @@ static void riscv_cps_realize(DeviceState *dev, Error **errp) for (i = 0; i < num_of_clusters; i++) { uint64_t cm_base = GLOBAL_CM_BASE + (CM_SIZE * i); uint32_t hartid_base = i << MHARTID_CLUSTER_SHIFT; - s->aplic = riscv_aplic_create(cm_base + AIA_PLIC_M_OFFSET, + s->aplic = riscv_aplic_create(get_system_memory(), + cm_base + AIA_PLIC_M_OFFSET, AIA_PLIC_M_SIZE, hartid_base, /* hartid_base */ MAX_HARTS, /* num_harts */ APLIC_NUM_SOURCES, APLIC_NUM_PRIO_BITS, false, true, NULL); - riscv_aplic_create(cm_base + AIA_PLIC_S_OFFSET, + riscv_aplic_create(get_system_memory(), + cm_base + AIA_PLIC_S_OFFSET, AIA_PLIC_S_SIZE, hartid_base, /* hartid_base */ MAX_HARTS, /* num_harts */ diff --git a/hw/riscv/xiangshan_kmh.c b/hw/riscv/xiangshan_kmh.c index 9eb608f8c578..c5a654ab417d 100644 --- a/hw/riscv/xiangshan_kmh.c +++ b/hw/riscv/xiangshan_kmh.c @@ -80,13 +80,15 @@ static DeviceState *xiangshan_kmh_create_aia(uint32_t num_harts) } /* M-level APLIC */ - aplic_m = riscv_aplic_create(memmap[XIANGSHAN_KMH_APLIC_M].base, + aplic_m = riscv_aplic_create(get_system_memory(), + memmap[XIANGSHAN_KMH_APLIC_M].base, memmap[XIANGSHAN_KMH_APLIC_M].size, 0, 0, XIANGSHAN_KMH_APLIC_NUM_SOURCES, 1, true, true, NULL); /* S-level APLIC */ - riscv_aplic_create(memmap[XIANGSHAN_KMH_APLIC_S].base, + riscv_aplic_create(get_system_memory(), + memmap[XIANGSHAN_KMH_APLIC_S].base, memmap[XIANGSHAN_KMH_APLIC_S].size, 0, 0, XIANGSHAN_KMH_APLIC_NUM_SOURCES, 1, true, false, aplic_m); -- 2.47.3