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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49cee5d1fa6sm66229575e9.1.2026.09.03.03.44.27 for (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Sep 2026 03:44:27 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PULL 39/51] target-info: remove machine_typename Date: Thu, 3 Sep 2026 12:39:23 +0200 Message-ID: <20260903103936.62355-40-philmd@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260903103936.62355-1-philmd@oss.qualcomm.com> References: <20260903103936.62355-1-philmd@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=YcmNIQRf c=1 sm=1 tr=0 ts=6a994f8d cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=4s3hRJSeHn4rkQlkrse1kQ==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=qKhv0Rusv1ucPuRBWVoA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTAzMDA5MiBTYWx0ZWRfX2vwISp1xDcBs 3ydvoNTlosxM1m1BUrZMvhIci1Si1Gd1G65l9HhXafhLdh58Ng23rj3/+T2J3nk8+8MyvmexoY2 ICTc/cXZZtXDk2qUheS8UMw1g8e0Mx0= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTAzMDA5MiBTYWx0ZWRfX+xGE3/iW0/2u KBFiYbn4o+MDsaohRYn30hDSBaWnrKbDKI0gE4I5OOPR3W2STxetFggGdrZi2uqFpMvOKGSZuu5 1rANAcrZpTGuNPR0W6hzGEt9Tu+5Ucxz3EINykgcBdpj/TlZCGNCSbgx9AyZfbp3HQUjkExg91X jc0HMpRhq000ybpdQrd6+jpIu95lC0ZImiy41hxKzSEkFB8wl412i9xTYcKiO/FquuKf1Mv31K9 Qi+3lSbViYE3hbBz+q2raWAG65+kxiJ+xiHNkPvm689B0KpYNoOEay3lsC+/tM8VOGcq0AGgPGf MRFAkLgw5VzH+kIeGhbp0eFhEUgv5U9ira/7LP+6KO9yKhLPSFR5iKu4/Ghl0HXrKg15OUapbbb jZVq9exMmc9mTBRdHsv9JVeft/4mpwqw96MtHPL6BXDuUtfZwGZVsMocV3dwVAMr0vcwUSHLD4H R65uHlaCb2tTV8p9RoA== X-Proofpoint-GUID: ax6vtBXaUmJVpnwuys-jBFLEMIN7dkaf X-Proofpoint-ORIG-GUID: ax6vtBXaUmJVpnwuys-jBFLEMIN7dkaf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-03_03,2026-09-03_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 priorityscore=1501 lowpriorityscore=0 adultscore=0 phishscore=0 impostorscore=0 spamscore=0 suspectscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609030092 Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Pierrick Bouvier This field is now unused, so we can remove it. Signed-off-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20260901202043.26532-5-pierrick.bouvier@oss.qualcomm.com> Signed-off-by: Philippe Mathieu-Daudé --- include/qemu/target-info-impl.h | 2 -- include/qemu/target-info.h | 8 -------- configs/targets/aarch64-softmmu.c | 1 - configs/targets/arm-softmmu.c | 1 - configs/targets/riscv32-softmmu.c | 1 - configs/targets/riscv64-softmmu.c | 1 - target-info-stub.c | 1 - target-info.c | 5 ----- 8 files changed, 20 deletions(-) diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-info-impl.h index c917d546eab..cf42aabbc8b 100644 --- a/include/qemu/target-info-impl.h +++ b/include/qemu/target-info-impl.h @@ -21,8 +21,6 @@ typedef struct TargetInfo { unsigned long_bits; /* runtime equivalent of CPU_RESOLVING_TYPE definition */ const char *cpu_type; - /* QOM typename machines for this binary must implement */ - const char *machine_typename; /* related to TARGET_BIG_ENDIAN definition */ EndianMode endianness; /* diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h index 6c5b714288e..b23e5bc5865 100644 --- a/include/qemu/target-info.h +++ b/include/qemu/target-info.h @@ -23,14 +23,6 @@ const char *target_name(void); */ unsigned target_long_bits(void); -/** - * target_machine_typename: - * - * Returns: Name of the QOM interface implemented by machines - * usable on this target binary. - */ -const char *target_machine_typename(void); - /** * target_cpu_type: * diff --git a/configs/targets/aarch64-softmmu.c b/configs/targets/aarch64-softmmu.c index 75d95b0e743..2200a4f19e9 100644 --- a/configs/targets/aarch64-softmmu.c +++ b/configs/targets/aarch64-softmmu.c @@ -18,7 +18,6 @@ static const TargetInfo target_info_aarch64_system = { .target_arch = SYS_EMU_TARGET_AARCH64, .long_bits = 64, .cpu_type = TYPE_ARM_CPU, - .machine_typename = TYPE_TARGET_AARCH64_MACHINE, .endianness = ENDIAN_MODE_LITTLE, .page_bits_vary = true, .page_bits_init = TARGET_PAGE_BITS_LEGACY, diff --git a/configs/targets/arm-softmmu.c b/configs/targets/arm-softmmu.c index 73546fa5737..9d558a0c1a1 100644 --- a/configs/targets/arm-softmmu.c +++ b/configs/targets/arm-softmmu.c @@ -18,7 +18,6 @@ static const TargetInfo target_info_arm_system = { .target_arch = SYS_EMU_TARGET_ARM, .long_bits = 32, .cpu_type = TYPE_ARM_CPU, - .machine_typename = TYPE_TARGET_ARM_MACHINE, .endianness = ENDIAN_MODE_LITTLE, .page_bits_vary = true, .page_bits_init = TARGET_PAGE_BITS_LEGACY, diff --git a/configs/targets/riscv32-softmmu.c b/configs/targets/riscv32-softmmu.c index 752c813077e..c1d94679c7e 100644 --- a/configs/targets/riscv32-softmmu.c +++ b/configs/targets/riscv32-softmmu.c @@ -18,7 +18,6 @@ static const TargetInfo target_info_riscv32_system = { .target_arch = SYS_EMU_TARGET_RISCV32, .long_bits = 32, .cpu_type = TYPE_RISCV_CPU, - .machine_typename = TYPE_TARGET_RISCV32_MACHINE, .endianness = ENDIAN_MODE_LITTLE, .page_bits_init = TARGET_PAGE_BITS, }; diff --git a/configs/targets/riscv64-softmmu.c b/configs/targets/riscv64-softmmu.c index 5150f0fe9d9..f648a5c8944 100644 --- a/configs/targets/riscv64-softmmu.c +++ b/configs/targets/riscv64-softmmu.c @@ -18,7 +18,6 @@ static const TargetInfo target_info_riscv64_system = { .target_arch = SYS_EMU_TARGET_RISCV64, .long_bits = 64, .cpu_type = TYPE_RISCV_CPU, - .machine_typename = TYPE_TARGET_RISCV64_MACHINE, .endianness = ENDIAN_MODE_LITTLE, .page_bits_init = TARGET_PAGE_BITS, }; diff --git a/target-info-stub.c b/target-info-stub.c index 22b7911201c..d121b8c0170 100644 --- a/target-info-stub.c +++ b/target-info-stub.c @@ -29,7 +29,6 @@ static const TargetInfo target_info_stub = { .target_arch = glue(SYS_EMU_TARGET_, TARGET_ARCH), .long_bits = TARGET_LONG_BITS, .cpu_type = CPU_RESOLVING_TYPE, - .machine_typename = TYPE_MACHINE, .endianness = TARGET_BIG_ENDIAN ? ENDIAN_MODE_BIG : ENDIAN_MODE_LITTLE, #ifdef TARGET_PAGE_BITS_VARY .page_bits_vary = true, diff --git a/target-info.c b/target-info.c index 04c69c41f8a..012b384036d 100644 --- a/target-info.c +++ b/target-info.c @@ -32,11 +32,6 @@ const char *target_cpu_type(void) return target_info()->cpu_type; } -const char *target_machine_typename(void) -{ - return target_info()->machine_typename; -} - EndianMode target_endian_mode(void) { return target_info()->endianness; -- 2.53.0