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envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Pierrick Bouvier Signed-off-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20260901202043.26532-12-pierrick.bouvier@oss.qualcomm.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/riscv/machines-qom.h | 6 ------ hw/core/null-machine.c | 5 +---- hw/riscv/virt.c | 2 -- target-info-qom.c | 13 ------------- target/riscv/machine.c | 4 ---- 5 files changed, 1 insertion(+), 29 deletions(-) diff --git a/include/hw/riscv/machines-qom.h b/include/hw/riscv/machines-qom.h index ee346227bb2..6c0bbdfc159 100644 --- a/include/hw/riscv/machines-qom.h +++ b/include/hw/riscv/machines-qom.h @@ -11,12 +11,6 @@ #include "hw/core/boards.h" -#define TYPE_TARGET_RISCV32_MACHINE \ - "target-info-riscv32-machine" - -#define TYPE_TARGET_RISCV64_MACHINE \ - "target-info-riscv64-machine" - /* * Interfaces specifying whether a given QOM object is available in * qemu-system-riscv32, qemu-system-riscv64, or both. diff --git a/hw/core/null-machine.c b/hw/core/null-machine.c index 2aa748233b3..2f008c4a702 100644 --- a/hw/core/null-machine.c +++ b/hw/core/null-machine.c @@ -56,7 +56,4 @@ static void machine_none_machine_init(MachineClass *mc) mc->no_cdrom = 1; } -DEFINE_MACHINE_WITH_INTERFACES("none", machine_none_machine_init, - { TYPE_TARGET_RISCV32_MACHINE }, - { TYPE_TARGET_RISCV64_MACHINE }, - { }) +DEFINE_MACHINE("none", machine_none_machine_init) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index d58656f70d1..d2ae321a376 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1811,8 +1811,6 @@ static const TypeInfo virt_machine_typeinfo = { .instance_size = sizeof(RISCVVirtState), .interfaces = (const InterfaceInfo[]) { { TYPE_HOTPLUG_HANDLER }, - { TYPE_TARGET_RISCV32_MACHINE }, - { TYPE_TARGET_RISCV64_MACHINE }, { } }, }; diff --git a/target-info-qom.c b/target-info-qom.c index 7959853e0da..f98d3d7698e 100644 --- a/target-info-qom.c +++ b/target-info-qom.c @@ -14,19 +14,6 @@ #include "qemu/target-info-qom.h" #include "hw/riscv/machines-qom.h" -static const TypeInfo target_info_types[] = { - { - .name = TYPE_TARGET_RISCV32_MACHINE, - .parent = TYPE_INTERFACE, - }, - { - .name = TYPE_TARGET_RISCV64_MACHINE, - .parent = TYPE_INTERFACE, - }, -}; - -DEFINE_TYPES(target_info_types) - static void target_info_qom_class_init(ObjectClass *oc, const void * data) { TargetInfoQomClass *klass = TARGET_INFO_CLASS(oc); diff --git a/target/riscv/machine.c b/target/riscv/machine.c index 31c49ca3e6a..59676c94470 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -582,17 +582,13 @@ const VMStateDescription vmstate_riscv_cpu = { }; const InterfaceInfo riscv32_machine_interfaces[] = { - { TYPE_TARGET_RISCV32_MACHINE }, { } }; const InterfaceInfo riscv64_machine_interfaces[] = { - { TYPE_TARGET_RISCV64_MACHINE }, { } }; const InterfaceInfo riscv32_64_machine_interfaces[] = { - { TYPE_TARGET_RISCV32_MACHINE }, - { TYPE_TARGET_RISCV64_MACHINE }, { } }; -- 2.53.0