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envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Pierrick Bouvier Signed-off-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20260901202043.26532-14-pierrick.bouvier@oss.qualcomm.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/riscv/machines-qom.h | 17 ----------------- hw/riscv/boston-aia.c | 2 +- hw/riscv/microblaze-v-generic.c | 2 +- 3 files changed, 2 insertions(+), 19 deletions(-) diff --git a/include/hw/riscv/machines-qom.h b/include/hw/riscv/machines-qom.h index e5f45b32e69..79d212eeb7d 100644 --- a/include/hw/riscv/machines-qom.h +++ b/include/hw/riscv/machines-qom.h @@ -11,21 +11,4 @@ #include "hw/core/boards.h" -/* - * Helper macros for defining machines available in qemu-system-riscv32, - * qemu-system-riscv64, or both. - */ - -#define DEFINE_MACHINE_RISCV32(namestr, machine_initfn) \ - DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \ - NULL) - -#define DEFINE_MACHINE_RISCV64(namestr, machine_initfn) \ - DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \ - NULL) - -#define DEFINE_MACHINE_RISCV32_64(namestr, machine_initfn) \ - DEFINE_MACHINE_WITH_INTERFACE_ARRAY(namestr, machine_initfn, \ - NULL) - #endif diff --git a/hw/riscv/boston-aia.c b/hw/riscv/boston-aia.c index 965d0f5699e..30eff10bc5f 100644 --- a/hw/riscv/boston-aia.c +++ b/hw/riscv/boston-aia.c @@ -474,4 +474,4 @@ static void boston_mach_class_init(MachineClass *mc) mc->default_cpu_type = TYPE_RISCV_CPU_MIPS_P8700; } -DEFINE_MACHINE_RISCV64("boston-aia", boston_mach_class_init) +DEFINE_MACHINE("boston-aia", boston_mach_class_init) diff --git a/hw/riscv/microblaze-v-generic.c b/hw/riscv/microblaze-v-generic.c index d33ac39a68c..503e8e08992 100644 --- a/hw/riscv/microblaze-v-generic.c +++ b/hw/riscv/microblaze-v-generic.c @@ -187,4 +187,4 @@ static void mb_v_generic_machine_init(MachineClass *mc) mc->default_cpus = 1; } -DEFINE_MACHINE_RISCV32_64("amd-microblaze-v-generic", mb_v_generic_machine_init) +DEFINE_MACHINE("amd-microblaze-v-generic", mb_v_generic_machine_init) -- 2.53.0