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Thu, 3 Sep 2026 19:24:48 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by SJ1PEPF000037A6.mail.protection.outlook.com (10.167.244.138) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.382.8 via Frontend Transport; Thu, 3 Sep 2026 19:24:48 +0000 Received: from georzhanmkm.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.46; Thu, 3 Sep 2026 14:24:47 -0500 From: George Zhang To: CC: Fangzhi Zuo , Ivan Lipski , "Alex Hung" , Harry Wentland , "George Zhang" Subject: [i-g-t, v2 2/2] tests/amdgpu/amd_dp_dsc: Reset link settings after subtest Date: Thu, 3 Sep 2026 15:24:52 -0400 Message-ID: <20260903192458.1149302-2-george.zhang@amd.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260903192458.1149302-1-george.zhang@amd.com> References: <20260903192458.1149302-1-george.zhang@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF000037A6:EE_|SJ0PR12MB7033:EE_ X-MS-Office365-Filtering-Correlation-Id: f862903c-5e18-467d-1573-08df09f104d4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Ip=[165.204.84.17]; Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000037A6.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB7033 X-BeenThere: igt-dev@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development mailing list for IGT GPU Tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" Currently, the link settings persist after the link settings subtest, and can retain a lowered link rate/lane count going into subsequent subtests. Fix it by resetting the link settings on an igt_fixture after running the dsc_link_settings subtest. We can do so by setting it to lane count and link rate unknown and letting the driver set it to the default values. Signed-off-by: George Zhang --- tests/amdgpu/amd_dp_dsc.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/tests/amdgpu/amd_dp_dsc.c b/tests/amdgpu/amd_dp_dsc.c index 690a6c39d..6c8e76e00 100644 --- a/tests/amdgpu/amd_dp_dsc.c +++ b/tests/amdgpu/amd_dp_dsc.c @@ -356,6 +356,23 @@ static void test_dsc_slice_dimensions_change(data_t *data) igt_skip_on(test_conn_cnt == 0); } +static void reset_link_settings(data_t *data) +{ + igt_output_t *output; + igt_crtc_t *crtc; + + for_each_crtc(&data->display, crtc) { + output = data->output[crtc->crtc_index]; + if (!output || !igt_output_is_connected(output) || + !is_dsc_capable(&data->mode[crtc->crtc_index])) + continue; + + igt_amd_write_link_settings(data->fd, output->name, + LANE_COUNT_UNKNOWN, LINK_RATE_UNKNOWN, + LINK_TRAINING_DEFAULT); + } +} + static void test_dsc_link_settings(data_t *data) { igt_output_t *output; @@ -609,6 +626,9 @@ int igt_main() { igt_subtest("dsc-link-settings") test_dsc_link_settings(&data); + igt_fixture() + reset_link_settings(&data); + igt_describe("Tests different bpc settings and logs if DSC is enabled/disabled"); igt_subtest("dsc-bpc") test_dsc_bpc(&data); -- 2.55.0