From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0473CC79F82 for ; Fri, 4 Sep 2026 20:00:44 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1x2a4M-0008Bm-Bl; Fri, 04 Sep 2026 15:59:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x2a4L-00087V-3j for qemu-devel@nongnu.org; Fri, 04 Sep 2026 15:59:25 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x2a4J-0007wu-C7 for qemu-devel@nongnu.org; Fri, 04 Sep 2026 15:59:24 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1788551962; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=giWvSJES9Am74xj7Gxo9BvxGBNVPmhOKyYmXMRbmmxg=; b=LFotlQhUoszxdmB3C9ER7awf8IsZh10KbNpKvZgiJtyoLGotJRSh99a/ipH4yDzNbKWrXI yx+ddBKxd9jJhj9g4Lq3PU6fX1m7dDNi0+lUuFuUhIPVtq1IAVMSU4GWZt0kKSo/nBvPRt 9T3BJ6ayc7C2OW7XXmaBikRRWR7PtHU= Received: from mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-35-cjExEn7bOL2XFJZIPy3VMw-1; Fri, 04 Sep 2026 15:59:19 -0400 X-MC-Unique: cjExEn7bOL2XFJZIPy3VMw-1 X-Mimecast-MFC-AGG-ID: cjExEn7bOL2XFJZIPy3VMw_1788551958 Received: from mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.111]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 1F9E519114BB; Fri, 4 Sep 2026 19:59:18 +0000 (UTC) Received: from localhost (headnet05.pony-001.prod.iad2.dc.redhat.com [10.2.32.117]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 1E19418001CE; Fri, 4 Sep 2026 19:59:16 +0000 (UTC) From: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= Date: Fri, 04 Sep 2026 23:58:02 +0400 Subject: [PATCH v4 19/75] microvm: convert OnOffAuto properties to QAPI-aware registration MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <20260904-qom-qapi-v4-19-a985f168e938@redhat.com> References: <20260904-qom-qapi-v4-0-a985f168e938@redhat.com> In-Reply-To: <20260904-qom-qapi-v4-0-a985f168e938@redhat.com> To: qemu-devel@nongnu.org Cc: Markus Armbruster , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Michael Roth , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Sergio Lopez , "Michael S. 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Signed-off-by: Marc-André Lureau --- hw/i386/microvm.c | 80 +++++++++++++++++++++++-------------------------------- 1 file changed, 34 insertions(+), 46 deletions(-) diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c index e7adab7d2ef7..3366f3b933f8 100644 --- a/hw/i386/microvm.c +++ b/hw/i386/microvm.c @@ -21,7 +21,7 @@ #include "qemu/units.h" #include "qapi/error.h" #include "qapi/visitor.h" -#include "qapi/qapi-visit-common.h" +#include "qapi/qapi-type-infos-common.h" #include "system/system.h" #include "system/cpus.h" #include "system/numa.h" @@ -519,55 +519,40 @@ static void microvm_machine_reset(MachineState *machine, ResetType type) } } -static void microvm_machine_get_rtc(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) +static int microvm_machine_get_rtc(Object *obj, Error **errp) { MicrovmMachineState *mms = MICROVM_MACHINE(obj); - OnOffAuto rtc = mms->rtc; - - visit_type_OnOffAuto(v, name, &rtc, errp); + return mms->rtc; } -static void microvm_machine_set_rtc(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) +static void microvm_machine_set_rtc(Object *obj, int value, Error **errp) { MicrovmMachineState *mms = MICROVM_MACHINE(obj); - - visit_type_OnOffAuto(v, name, &mms->rtc, errp); + mms->rtc = value; } -static void microvm_machine_get_pcie(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) +static int microvm_machine_get_pcie(Object *obj, Error **errp) { MicrovmMachineState *mms = MICROVM_MACHINE(obj); - OnOffAuto pcie = mms->pcie; - - visit_type_OnOffAuto(v, name, &pcie, errp); + return mms->pcie; } -static void microvm_machine_set_pcie(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) +static void microvm_machine_set_pcie(Object *obj, int value, Error **errp) { MicrovmMachineState *mms = MICROVM_MACHINE(obj); - - visit_type_OnOffAuto(v, name, &mms->pcie, errp); + mms->pcie = value; } -static void microvm_machine_get_ioapic2(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) +static int microvm_machine_get_ioapic2(Object *obj, Error **errp) { MicrovmMachineState *mms = MICROVM_MACHINE(obj); - OnOffAuto ioapic2 = mms->ioapic2; - - visit_type_OnOffAuto(v, name, &ioapic2, errp); + return mms->ioapic2; } -static void microvm_machine_set_ioapic2(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) +static void microvm_machine_set_ioapic2(Object *obj, int value, Error **errp) { MicrovmMachineState *mms = MICROVM_MACHINE(obj); - - visit_type_OnOffAuto(v, name, &mms->ioapic2, errp); + mms->ioapic2 = value; } static bool microvm_machine_get_isa_serial(Object *obj, Error **errp) @@ -673,26 +658,29 @@ static void microvm_class_init(ObjectClass *oc, const void *data) hc->unplug_request = microvm_device_unplug_request_cb; hc->unplug = microvm_device_unplug_cb; - object_class_property_add(oc, MICROVM_MACHINE_RTC, "OnOffAuto", - microvm_machine_get_rtc, - microvm_machine_set_rtc, - NULL, NULL); - object_class_property_set_description(oc, MICROVM_MACHINE_RTC, - "Enable MC146818 RTC"); + object_class_property_add_qapi_enum(oc, QAPI_ENUM_PROP( + .name = MICROVM_MACHINE_RTC, + .description = "Enable MC146818 RTC", + .qapi_type = &OnOffAuto_type_info, + .get = microvm_machine_get_rtc, + .set = microvm_machine_set_rtc, + )); - object_class_property_add(oc, MICROVM_MACHINE_PCIE, "OnOffAuto", - microvm_machine_get_pcie, - microvm_machine_set_pcie, - NULL, NULL); - object_class_property_set_description(oc, MICROVM_MACHINE_PCIE, - "Enable PCIe"); + object_class_property_add_qapi_enum(oc, QAPI_ENUM_PROP( + .name = MICROVM_MACHINE_PCIE, + .description = "Enable PCIe", + .qapi_type = &OnOffAuto_type_info, + .get = microvm_machine_get_pcie, + .set = microvm_machine_set_pcie, + )); - object_class_property_add(oc, MICROVM_MACHINE_IOAPIC2, "OnOffAuto", - microvm_machine_get_ioapic2, - microvm_machine_set_ioapic2, - NULL, NULL); - object_class_property_set_description(oc, MICROVM_MACHINE_IOAPIC2, - "Enable second IO-APIC"); + object_class_property_add_qapi_enum(oc, QAPI_ENUM_PROP( + .name = MICROVM_MACHINE_IOAPIC2, + .description = "Enable second IO-APIC", + .qapi_type = &OnOffAuto_type_info, + .get = microvm_machine_get_ioapic2, + .set = microvm_machine_set_ioapic2, + )); object_class_property_add_bool(oc, MICROVM_MACHINE_ISA_SERIAL, microvm_machine_get_isa_serial, -- 2.55.0.543.g5ebe2ebe4ea8