From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ABB4EC624DE for ; Fri, 4 Sep 2026 08:11:36 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4A95010E423; Fri, 4 Sep 2026 08:11:36 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="bDURG3Em"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2EEF510F931 for ; Fri, 4 Sep 2026 08:10:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1788509447; x=1820045447; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=N182L6Iyn5hte9e8H0VBsdjWduyulEnKAVoAJZ6fHos=; b=bDURG3EmTAxcEmj3/NdX2XMmRBHICbonsVceladrMRpag7uiRMthPiLH oR/vN1qndtS98iT/oUoD2hvH4xLJ2cLySnhykeVfQ91/kVYlypJjPmqar L37WQSVVS1sKuavAsXWSYHk+dd4vmCogEwCz1Sefc7nzT8SpHwndOPjd4 RdMB1SiqfXrith2yZXOJjt3njRzW2pXqiEN9g8rDHu69t95XlWM9DFFgr yifeV3APiPtujb8olkAAosajB+Q9yY477F7i92itoFX1xrfAc77zIK26P 5nu54/X27WKtWR65GYOKBAMTJemwROgwA3+71b6vulyUdOVoampJIS9Ji Q==; X-CSE-ConnectionGUID: q/WfRLX7QgOs3tUHX7CgFQ== X-CSE-MsgGUID: 46IpLpJ/QNiSawvxLwVsJw== X-IronPort-AV: E=McAfee;i="6800,10657,11895"; a="100166339" X-IronPort-AV: E=Sophos;i="6.25,260,1779174000"; d="scan'208";a="100166339" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Sep 2026 01:10:46 -0700 X-CSE-ConnectionGUID: Ls8RY+dnT6WT6DaTP47Dfw== X-CSE-MsgGUID: bpDou+PqQ6WDPvtVhDCkYw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,260,1779174000"; d="scan'208";a="267399571" Received: from suja-super-server.iind.intel.com ([10.190.238.52]) by fmviesa008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Sep 2026 01:10:45 -0700 From: Sujaritha Sundaresan To: igt-dev@lists.freedesktop.org Cc: zbigniew.kempczynski@intel.com, andrzej.hajda@intel.com, Sujaritha Sundaresan Subject: [PATCH i-g-t 0/2] Derive write-through availability from the PAT config Date: Fri, 4 Sep 2026 14:26:48 +0530 Message-Id: <20260904085650.98553-1-sujaritha.sundaresan@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: igt-dev@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development mailing list for IGT GPU Tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" Not every platform has a write-through entry in its PAT table. Where there is none the KMD reports the UC index for XE_CACHE_WT, so a test which asks for write-through quietly gets uncached instead, re-running coverage it already has under a misleading name. Spotting that currently means enumerating IP versions in the test, which needs revisiting for every new platform. Patch 1 adds intel_pat_has_wt(), which answers the question from the PAT config itself: a WT index which aliases UC means there is no distinct write-through entry. Patch 2 uses it to skip the write-through checks in xe_pat where there is nothing to exercise, so they report an honest skip rather than a pass. Following the library guidance in CONTRIBUTING.md, the helper is a plain query: no igt_require()/igt_skip() in the library, the tests decide what to do with the answer. intel_get_pat_idx_wt() itself is deliberately left alone here. Having it return XE_PAT_IDX_INVALID rather than the UC index is the stricter fix and probably the right end state, but it changes behaviour for the callers in kms_ccs and xe_exec_system_allocator as well, so it seems better as a follow-up once the helper is in tree. No functional change intended for platforms which do have a write-through PAT index. Sujaritha Sundaresan (2): lib/intel_pat: add intel_pat_has_wt() tests/intel/xe_pat: skip the write-through checks without a WT index lib/intel_pat.c | 22 ++++++++++++++++++++++ lib/intel_pat.h | 2 ++ tests/intel/xe_pat.c | 38 ++++++++++++++++++++++---------------- 3 files changed, 46 insertions(+), 16 deletions(-) -- 2.34.1