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From: Yao Zi <me@ziyao.cc>
To: Tom Rini <trini@konsulko.com>, Tim Ouyang <tim609@andestech.com>,
	Leo Liang <leo.liang@sifive.com>
Cc: u-boot@lists.u-boot-project.org, Yao Zi <me@ziyao.cc>
Subject: [PATCH] MAINTAINERS: Include riscv_timer.c in RISC-V entry
Date: Fri,  4 Sep 2026 19:35:18 +0000	[thread overview]
Message-ID: <20260904193517.22312-2-me@ziyao.cc> (raw)

Maybe because it was added after introduction of RISC-V architecture,
the generic RISC-V S-Mode timer driver, riscv_timer.c, isn't included
in the RISC-V MAINTAINERS entry. Cover it with the RISC-V entry.

Signed-off-by: Yao Zi <me@ziyao.cc>
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 2b3a9ac1f2ae..ab8e611e4eb8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1518,6 +1518,7 @@ F:	doc/arch/riscv.rst
 F:	drivers/sysreset/sysreset_sbi.c
 F:	drivers/timer/andes_plmt_timer.c
 F:	drivers/timer/riscv_aclint_timer.c
+F:	drivers/timer/riscv_timer.c
 F:	tools/prelink-riscv.c
 
 RISC-V CANAAN KENDRYTE K210
-- 
2.55.0


             reply	other threads:[~2026-09-04 19:39 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-04 19:35 Yao Zi [this message]
2026-09-04 20:02 ` [PATCH] MAINTAINERS: Include riscv_timer.c in RISC-V entry Tom Rini
2026-09-05 16:23   ` Yao Zi

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