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[124.218.201.66]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39b08bcc060sm23976996a91.3.2026.09.06.05.09.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Sep 2026 05:09:08 -0700 (PDT) From: "Lucien.Jheng" To: weijie.gao@mediatek.com, chunfeng.yun@mediatek.com, igor.belwon@mentallysanemainliners.org, dlechner@baylibre.com, jstephan@baylibre.com, GSS_MTK_Uboot_upstream@mediatek.com, peng.fan@nxp.com, jh80.chung@samsung.com, jbx6244@gmail.com, msp@baylibre.com, u-boot@lists.u-boot-project.org Cc: frank-w@public-files.de, daniel@makrotopia.org, lucienzx159@gmail.com, skylake.huang@mediatek.com Subject: [PATCH v1] arm: mediatek: add BPi-R3 Mini eMMC board support Date: Sun, 6 Sep 2026 20:07:56 +0800 Message-Id: <20260906120756.8290-1-lucienzx159@gmail.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Mailman-Approved-At: Sun, 06 Sep 2026 16:46:42 +0000 X-BeenThere: u-boot@lists.u-boot-project.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.u-boot-project.org Add device tree and defconfig for the Bananapi BPi-R3 Mini, an eMMC-only variant of the BPi-R3 board built around the MT7986A SoC. The board dtsi enables the MT7986 eMMC controller, SPI-NAND flash, PWM, and the on-board Airoha EN8811H 2.5G PHY via mdio. The mt7986a_bpir3_mini_emmc_defconfig enables the drivers needed for this variant: SPI-NAND (MTD/UBI), USB xHCI, PCIe Gen3 with NVMe, the Airoha EN8811H PHY driver, and RNG/pstore support. Signed-off-by: Lucien.Jheng --- arch/arm/dts/Makefile | 1 + arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts | 236 ++++++++++++++++++++++ configs/mt7986a_bpir3_mini_emmc_defconfig | 139 +++++++++++++ 3 files changed, 376 insertions(+) create mode 100644 arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts create mode 100644 configs/mt7986a_bpir3_mini_emmc_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 1b533721bb4..b62a4334750 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1080,6 +1080,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt7981-sd-rfb.dtb \ mt7986a-bpi-r3-sd.dtb \ mt7986a-bpi-r3-emmc.dtb \ + mt7986a-bpi-r3-mini-emmc.dtb \ mt7986a-rfb.dtb \ mt7986b-rfb.dtb \ mt7986a-sd-rfb.dtb \ diff --git a/arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts b/arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts new file mode 100644 index 00000000000..18320b20be8 --- /dev/null +++ b/arch/arm/dts/mt7986a-bpi-r3-mini-emmc.dts @@ -0,0 +1,236 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +/dts-v1/; +#include "mt7986.dtsi" +#include +#include + +/ { + #address-cells = <1>; + #size-cells = <1>; + model = "Bananapi BPi-R3 Mini"; + compatible = "mediatek,mt7986", "mediatek,mt7986-rfb"; + + chosen { + stdout-path = &uart0; + tick-timer = &timer0; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x40000000 0x80000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + button-reset { + label = "reset"; + linux,code = ; + gpios = <&pio 7 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + status_led: led-0 { + label = "green:status"; + gpios = <&pio 19 GPIO_ACTIVE_HIGH>; + }; + + led-1 { + label = "blue:wlan2g"; + gpios = <&pio 1 GPIO_ACTIVE_HIGH>; + }; + + led-2 { + label = "blue:wlan5g"; + gpios = <&pio 2 GPIO_ACTIVE_HIGH>; + }; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; +}; + +ð { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins>; + + mediatek,gmac-id = <0>; + phy-mode = "2500base-x"; + phy-handle = <&phy14>; + + phy14: eth-phy@14 { + compatible = "ethernet-phy-id03a2.a411"; + reg = <14>; + pinctrl-names = "default"; + pinctrl-0 = <&en8811_pwr_a>; + airoha,pnswap-rx; + + reset-gpios = <&pio 49 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <20000>; + }; + + /*phy15: eth-phy@15 { + compatible = "ethernet-phy-id03a2.a411"; + reg = <15>; + + pinctrl-names = "default"; + pinctrl-0 = <&en8811_pwr_b>; + airoha,pnswap-rx; + + reset-gpios = <&pio 47 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <20000>; + };*/ +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_default>; + bus-width = <8>; + max-frequency = <200000000>; + cap-mmc-highspeed; + cap-mmc-hw-reset; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + non-removable; + status = "okay"; +}; + +&pio { + en8811_pwr_a: en8811-pwr-a { + pins = "GPIO_11"; + drive-strength = ; + bias-pull-down = ; + output-low; + }; + + en8811_pwr_b: en8811-pwr-b { + pins = "GPIO_12"; + drive-strength = ; + bias-pull-down = ; + output-low; + }; + + mdio_pins: mdio-pins { + mux { + function = "eth"; + groups = "mdc_mdio"; + }; + }; + + mmc0_pins_default: mmc0default { + mux { + function = "flash"; + groups = "emmc_51"; + }; + + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = ; + bias-pull-up = ; + }; + + conf-clk { + pins = "EMMC_CK"; + drive-strength = ; + bias-pull-down = ; + }; + + conf-dsl { + pins = "EMMC_DSL"; + bias-pull-down = ; + }; + + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = ; + bias-pull-up = ; + }; + }; + + spi_flash_pins: spi0-pins-func-1 { + mux { + function = "flash"; + groups = "spi0", "spi0_wp_hold"; + }; + + conf-pu { + pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP"; + drive-strength = ; + bias-pull-up = ; + }; + + conf-pd { + pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO"; + drive-strength = ; + bias-pull-down = ; + }; + }; + + pwm_pins: pwm0-pins-func-1 { + mux { + function = "pwm"; + groups = "pwm0"; + }; + }; +}; + +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm_pins>; + status = "okay"; +}; + +&spi0 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi_flash_pins>; + status = "okay"; + must_tx; + enhance_timing; + dma_ext; + ipm_design; + support_quad; + tick_dly = <1>; + sample_sel = <0>; + + spi_nand@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <52000000>; + }; + +}; + +&uart0 { + status = "okay"; +}; + +&watchdog { + status = "disabled"; +}; diff --git a/configs/mt7986a_bpir3_mini_emmc_defconfig b/configs/mt7986a_bpir3_mini_emmc_defconfig new file mode 100644 index 00000000000..411ad11d6a7 --- /dev/null +++ b/configs/mt7986a_bpir3_mini_emmc_defconfig @@ -0,0 +1,139 @@ +CONFIG_ARM=y +CONFIG_ARM_SMCCC=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y +CONFIG_POSITION_INDEPENDENT=y +CONFIG_ARCH_MEDIATEK=y +CONFIG_TEXT_BASE=0x41e00000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x80000 +CONFIG_ENV_OFFSET=0x300000 +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-bpi-r3-mini-emmc" +CONFIG_TARGET_MT7986=y +CONFIG_DEBUG_UART_BASE=0x11002000 +CONFIG_DEBUG_UART_CLOCK=40000000 +CONFIG_SYS_LOAD_ADDR=0x46000000 +CONFIG_DEBUG_UART=y +CONFIG_DEFAULT_FDT_FILE="mt7986a-bpi-r3-mini-emmc" +CONFIG_LOGLEVEL=7 +CONFIG_LOG=y +CONFIG_SYS_PROMPT="BPI-R3M> " +CONFIG_SYS_CBSIZE=512 +CONFIG_SYS_PBSIZE=1049 +# CONFIG_BOOTM_NETBSD is not set +# CONFIG_BOOTM_PLAN9 is not set +# CONFIG_BOOTM_RTEMS is not set +# CONFIG_BOOTM_VXWORKS is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_UNLZ4 is not set +# CONFIG_CMD_UNZIP is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_GPT_RENAME=y +CONFIG_CMD_LSBLK=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_READ=y +CONFIG_CMD_PING=y +CONFIG_CMD_SMC=y +CONFIG_CMD_FAT=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_PARTITION_TYPE_GUID=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_CLK=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_MMC_MTK=y +CONFIG_PHY_FIXED=y +CONFIG_DM_MDIO=y +CONFIG_MEDIATEK_ETH=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_PINCTRL_MT7986=y +CONFIG_POWER_DOMAIN=y +CONFIG_MTK_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_SERIAL=y +CONFIG_MTK_SERIAL=y +CONFIG_FAT_WRITE=y +CONFIG_HEXDUMP=y +# CONFIG_EFI_LOADER is not set +CONFIG_LMB_MAX_REGIONS=64 + +CONFIG_AUTOBOOT=y +#CONFIG_BOOTDELAY=2 + +CONFIG_FIT=y +CONFIG_ENV_USE_DEFAULT_ENV_TEXT_FILE=y +CONFIG_ENV_DEFAULT_ENV_TEXT_FILE="uEnv_r3.txt" +CONFIG_HUSH_PARSER=y + +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_UBI=y +CONFIG_CMD_UBI=y +CONFIG_CMD_UBIFS=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_MTD_SPI_NAND=y +CONFIG_MTK_SPIM=y +#CONFIG_MTK_SPI_NAND=y +#CONFIG_MTK_SPI_NAND_MTD=y +#CONFIG_MTK_SNOR=y +#CONFIG_MTK_SNFI_SPI=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_MTD=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_CMD_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_CMD_SF=y +#CONFIG_MTD_RAW_NAND=y +#CONFIG_CMD_NAND=y +#CONFIG_CMD_NAND_TRIMFFS=y +CONFIG_ENABLE_NAND_NMBM=y +CONFIG_MTDIDS_DEFAULT="nmbm0=nmbm0" +CONFIG_MTDPARTS_DEFAULT="nmbm0:1024k(bl2),512k(u-boot-env),2048k(factory),2048k(fip),65536k(ubi)" +CONFIG_PHY=y +CONFIG_PHY_MTK_TPHY=y +CONFIG_DM_USB=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_MTK=y +CONFIG_CMD_USB=y +CONFIG_USB_STORAGE=y +CONFIG_CMD_ASKENV=y +CONFIG_CMD_STRINGS=y +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_CMD_BOOTMENU=y +CONFIG_SUPPORT_EMMC_BOOT=y + +CONFIG_FS_LOADER=y +CONFIG_PHY_AIROHA=y +CONFIG_PHY_AIROHA_EN8811=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_AIROHA_FW_BUILTIN=y +CONFIG_PHY_ETHERNET_ID=y + +CONFIG_PCI=y +CONFIG_PCIE_MEDIATEK_GEN3=y +CONFIG_CMD_PCI=y +CONFIG_NVME_PCI=y +CONFIG_NVME=y +CONFIG_CMD_CACHE=y + +CONFIG_CMD_PSTORE=y +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000 +CONFIG_CMD_PSTORE_RECORD_SIZE=0x1000 +#CONFIG_CMD_PSTORE_CONSOLE_SIZE=0x1000 +#CONFIG_CMD_PSTORE_FTRACE_SIZE=0x0 +#CONFIG_CMD_PSTORE_PMSG_SIZE=0x1000 + +CONFIG_DM_RNG=y +CONFIG_RNG_MTK_V2=y +CONFIG_CMD_RNG=y -- 2.34.1