From: "lianfeng.ouyang" <lianfeng.ouyang@starfivetech.com>
To: Olivia Mackall <olivia@selenic.com>,
Herbert Xu <herbert@gondor.apana.org.au>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-crypto@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Lianfeng Ouyang <lianfeng.ouyang@starfivetech.com>
Subject: [PATCH v8 2/2] hwrng: starfive: rework clk/reset teardown order for JHB100
Date: Mon, 7 Sep 2026 11:16:03 +0800 [thread overview]
Message-ID: <20260907031603.188483-3-lianfeng.ouyang@starfivetech.com> (raw)
In-Reply-To: <20260907031603.188483-1-lianfeng.ouyang@starfivetech.com>
From: Lianfeng Ouyang <lianfeng.ouyang@starfivetech.com>
Rework the StarFive TRNG driver to address hardware-specific requirements
for JHB100 SoC. To avoid reset-domain crossing glitches, the driver now
ensures clocks are gated before asserting reset during teardown for
JHB100, while JH7110 retains the original reset-first sequence.
Add per-compatible match data (struct starfive_trng_data) describing the
clock/reset teardown order, a new "starfive,jhb100-trng" compatible, and
select the ordering from it.
Fix the runtime-PM get/put balancing across the init/read/reseed/cleanup
paths, manage PM and the clk/reset teardown via devm so all error paths
unwind correctly, run the SEU-triggered reseed from a workqueue instead
of hard IRQ, and serialise the command sequences with a mutex.
Signed-off-by: Lianfeng Ouyang <lianfeng.ouyang@starfivetech.com>
---
MAINTAINERS | 2 +-
drivers/char/hw_random/jh7110-trng.c | 297 +++++++++++++++++++++------
2 files changed, 239 insertions(+), 60 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 6d998ed051a8..5211aa88048f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -26239,7 +26239,7 @@ F: Documentation/devicetree/bindings/perf/starfive,jh8100-starlink-pmu.yaml
F: drivers/perf/starfive_starlink_pmu.c
STARFIVE TRNG DRIVER
-M: Jia Jie Ho <jiajie.ho@starfivetech.com>
+M: Lianfeng Ouyang <lianfeng.ouyang@starfivetech.com>
S: Supported
F: Documentation/devicetree/bindings/rng/starfive*
F: drivers/char/hw_random/jh7110-trng.c
diff --git a/drivers/char/hw_random/jh7110-trng.c b/drivers/char/hw_random/jh7110-trng.c
index aee12caab578..ecc7d5bd7bf5 100644
--- a/drivers/char/hw_random/jh7110-trng.c
+++ b/drivers/char/hw_random/jh7110-trng.c
@@ -92,22 +92,44 @@ enum mode {
PRNG_256BIT,
};
+/*
+ * For JHB100, assert reset after disabling clocks to avoid
+ * reset-domain crossing (RDC) induced glitches that can affect
+ * downstream IPs.
+ */
+enum seq_rst_clk {
+ SEQ_RST_FIRST,
+ SEQ_CLK_FIRST,
+};
+
+struct starfive_trng_data {
+ enum seq_rst_clk seq_rst_clk;
+};
+
struct starfive_trng {
struct device *dev;
void __iomem *base;
+ int irq;
struct clk *hclk;
struct clk *ahb;
struct reset_control *rst;
struct hwrng rng;
struct completion random_done;
struct completion reseed_done;
+ struct work_struct work;
+ const struct starfive_trng_data *data;
u32 mode;
+ u32 cleanup;
u32 mission;
u32 reseed;
- /* protects against concurrent write to ctrl register */
- spinlock_t write_lock;
+ struct mutex lock; /* protect trng cmd seq */
};
+static inline struct starfive_trng *work_to_trng(struct work_struct *work)
+{
+ return container_of(work, struct starfive_trng, work);
+}
+
static u16 autoreq;
module_param(autoreq, ushort, 0);
MODULE_PARM_DESC(autoreq, "Auto-reseeding after random number requests by host reaches specified counter:\n"
@@ -130,7 +152,7 @@ static inline int starfive_trng_wait_idle(struct starfive_trng *trng)
10, 100000);
}
-static inline void starfive_trng_irq_mask_clear(struct starfive_trng *trng)
+static inline void starfive_trng_irq_clear(struct starfive_trng *trng)
{
/* clear register: ISTAT */
u32 data = readl(trng->base + STARFIVE_ISTAT);
@@ -138,6 +160,28 @@ static inline void starfive_trng_irq_mask_clear(struct starfive_trng *trng)
writel(data, trng->base + STARFIVE_ISTAT);
}
+static void starfive_trng_release(void *data)
+{
+ struct starfive_trng *trng = data;
+
+ if (!pm_runtime_status_suspended(trng->dev)) {
+ writel(0, trng->base + STARFIVE_IE);
+ starfive_trng_irq_clear(trng);
+
+ if (trng->irq >= 0)
+ synchronize_irq(trng->irq);
+
+ if (trng->data->seq_rst_clk == SEQ_RST_FIRST)
+ reset_control_assert(trng->rst);
+
+ clk_disable_unprepare(trng->ahb);
+ clk_disable_unprepare(trng->hclk);
+
+ if (trng->data->seq_rst_clk == SEQ_CLK_FIRST)
+ reset_control_assert(trng->rst);
+ }
+}
+
static int starfive_trng_cmd(struct starfive_trng *trng, u32 cmd, bool wait)
{
int wait_time = 1000;
@@ -149,17 +193,13 @@ static int starfive_trng_cmd(struct starfive_trng *trng, u32 cmd, bool wait)
switch (cmd) {
case STARFIVE_CTRL_GENE_RANDNUM:
reinit_completion(&trng->random_done);
- spin_lock_irq(&trng->write_lock);
writel(cmd, trng->base + STARFIVE_CTRL);
- spin_unlock_irq(&trng->write_lock);
if (!wait_for_completion_timeout(&trng->random_done, usecs_to_jiffies(wait_time)))
return -ETIMEDOUT;
break;
case STARFIVE_CTRL_EXEC_RANDRESEED:
reinit_completion(&trng->reseed_done);
- spin_lock_irq(&trng->write_lock);
writel(cmd, trng->base + STARFIVE_CTRL);
- spin_unlock_irq(&trng->write_lock);
if (!wait_for_completion_timeout(&trng->reseed_done, usecs_to_jiffies(wait_time)))
return -ETIMEDOUT;
break;
@@ -174,13 +214,24 @@ static int starfive_trng_init(struct hwrng *rng)
{
struct starfive_trng *trng = to_trng(rng);
u32 mode, intr = 0;
+ int ret;
+
+ ret = pm_runtime_resume_and_get(trng->dev);
+ if (ret < 0) {
+ dev_warn(trng->dev, "Failed to wake device for init: %d\n", ret);
+ return ret;
+ }
+
+ mutex_lock(&trng->lock);
+
+ WRITE_ONCE(trng->cleanup, 0);
/* setup Auto Request/Age register */
writel(autoage, trng->base + STARFIVE_AUTO_AGE);
writel(autoreq, trng->base + STARFIVE_AUTO_RQSTS);
/* clear register: ISTAT */
- starfive_trng_irq_mask_clear(trng);
+ starfive_trng_irq_clear(trng);
intr |= STARFIVE_IE_ALL;
writel(intr, trng->base + STARFIVE_IE);
@@ -201,45 +252,105 @@ static int starfive_trng_init(struct hwrng *rng)
writel(mode, trng->base + STARFIVE_MODE);
- return starfive_trng_cmd(trng, STARFIVE_CTRL_EXEC_RANDRESEED, 1);
+ ret = starfive_trng_cmd(trng, STARFIVE_CTRL_EXEC_RANDRESEED, 1);
+
+ mutex_unlock(&trng->lock);
+
+ pm_runtime_put_autosuspend(trng->dev);
+
+ return ret;
+}
+
+static void starfive_trng_randreseed_work(struct work_struct *work)
+{
+ struct starfive_trng *trng = work_to_trng(work);
+ int ret;
+
+ ret = pm_runtime_resume_and_get(trng->dev);
+ if (ret < 0) {
+ dev_warn(trng->dev, "Failed to wake device for reseed: %d\n", ret);
+ return;
+ }
+
+ mutex_lock(&trng->lock);
+
+ if (READ_ONCE(trng->cleanup))
+ goto unlock;
+
+ reinit_completion(&trng->reseed_done);
+ writel(STARFIVE_CTRL_EXEC_RANDRESEED, trng->base + STARFIVE_CTRL);
+
+unlock:
+ mutex_unlock(&trng->lock);
+
+ pm_runtime_put_autosuspend(trng->dev);
}
static irqreturn_t starfive_trng_irq(int irq, void *priv)
{
+ int ret;
u32 status;
struct starfive_trng *trng = (struct starfive_trng *)priv;
+ ret = pm_runtime_get_if_active(trng->dev);
+ if (ret <= 0) {
+ dev_err_ratelimited(trng->dev, "pm is inactive in irq\n");
+ return IRQ_NONE;
+ }
+
status = readl(trng->base + STARFIVE_ISTAT);
- if (status & STARFIVE_ISTAT_RAND_RDY) {
+ if (status & STARFIVE_ISTAT_RAND_RDY)
writel(STARFIVE_ISTAT_RAND_RDY, trng->base + STARFIVE_ISTAT);
- complete(&trng->random_done);
- }
- if (status & STARFIVE_ISTAT_SEED_DONE) {
+ if (status & STARFIVE_ISTAT_SEED_DONE)
writel(STARFIVE_ISTAT_SEED_DONE, trng->base + STARFIVE_ISTAT);
- complete(&trng->reseed_done);
- }
if (status & STARFIVE_ISTAT_LFSR_LOCKUP) {
writel(STARFIVE_ISTAT_LFSR_LOCKUP, trng->base + STARFIVE_ISTAT);
/* SEU occurred, reseeding required*/
- spin_lock(&trng->write_lock);
- writel(STARFIVE_CTRL_EXEC_RANDRESEED, trng->base + STARFIVE_CTRL);
- spin_unlock(&trng->write_lock);
+ schedule_work(&trng->work);
}
+ if (status & STARFIVE_ISTAT_RAND_RDY)
+ complete(&trng->random_done);
+
+ if (status & STARFIVE_ISTAT_SEED_DONE)
+ complete(&trng->reseed_done);
+
+ pm_runtime_put_noidle(trng->dev);
+
return IRQ_HANDLED;
}
static void starfive_trng_cleanup(struct hwrng *rng)
{
struct starfive_trng *trng = to_trng(rng);
+ int ret;
+
+ ret = pm_runtime_resume_and_get(trng->dev);
+ if (ret < 0) {
+ dev_warn(trng->dev, "Failed to wake device for cleanup: %d\n", ret);
+ goto end;
+ }
+
+ mutex_lock(&trng->lock);
+
+ writel(0, trng->base + STARFIVE_IE);
+ starfive_trng_irq_clear(trng);
+
+ if (trng->irq >= 0)
+ synchronize_irq(trng->irq);
writel(0, trng->base + STARFIVE_CTRL);
- reset_control_assert(trng->rst);
- clk_disable_unprepare(trng->hclk);
- clk_disable_unprepare(trng->ahb);
+ WRITE_ONCE(trng->cleanup, 1);
+
+ mutex_unlock(&trng->lock);
+
+ pm_runtime_put_sync(trng->dev);
+
+end:
+ cancel_work_sync(&trng->work);
}
static int starfive_trng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
@@ -247,7 +358,18 @@ static int starfive_trng_read(struct hwrng *rng, void *buf, size_t max, bool wai
struct starfive_trng *trng = to_trng(rng);
int ret;
- pm_runtime_get_sync(trng->dev);
+ ret = pm_runtime_resume_and_get(trng->dev);
+ if (ret < 0) {
+ dev_warn(trng->dev, "Failed to wake device for read: %d\n", ret);
+ return ret;
+ }
+
+ if (wait) {
+ mutex_lock(&trng->lock);
+ } else {
+ if (!mutex_trylock(&trng->lock))
+ return -EAGAIN;
+ }
if (trng->mode == PRNG_256BIT)
max = min_t(size_t, max, (STARFIVE_RAND_LEN * 8));
@@ -256,28 +378,29 @@ static int starfive_trng_read(struct hwrng *rng, void *buf, size_t max, bool wai
if (wait) {
ret = starfive_trng_wait_idle(trng);
- if (ret) {
- ret = -ETIMEDOUT;
- goto out_put;
- }
+ if (ret)
+ goto end;
}
ret = starfive_trng_cmd(trng, STARFIVE_CTRL_GENE_RANDNUM, wait);
if (ret)
- goto out_put;
+ goto end;
memcpy_fromio(buf, trng->base + STARFIVE_RAND0, max);
+
ret = max;
-out_put:
- pm_runtime_put_sync_autosuspend(trng->dev);
+end:
+ mutex_unlock(&trng->lock);
+
+ pm_runtime_put_autosuspend(trng->dev);
+
return ret;
}
static int starfive_trng_probe(struct platform_device *pdev)
{
int ret;
- int irq;
struct starfive_trng *trng;
trng = devm_kzalloc(&pdev->dev, sizeof(*trng), GFP_KERNEL);
@@ -285,26 +408,22 @@ static int starfive_trng_probe(struct platform_device *pdev)
return -ENOMEM;
platform_set_drvdata(pdev, trng);
+
trng->dev = &pdev->dev;
+ trng->data = of_device_get_match_data(&pdev->dev);
+ if (!trng->data)
+ return -EINVAL;
+
+ if (trng->data->seq_rst_clk != SEQ_RST_FIRST && trng->data->seq_rst_clk != SEQ_CLK_FIRST) {
+ dev_err(&pdev->dev, "Unknown seq_rst_clk value\n");
+ return -EINVAL;
+ }
trng->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(trng->base))
return dev_err_probe(&pdev->dev, PTR_ERR(trng->base),
"Error remapping memory for platform device.\n");
- irq = platform_get_irq(pdev, 0);
- if (irq < 0)
- return irq;
-
- init_completion(&trng->random_done);
- init_completion(&trng->reseed_done);
- spin_lock_init(&trng->write_lock);
-
- ret = devm_request_irq(&pdev->dev, irq, starfive_trng_irq, 0, pdev->name,
- (void *)trng);
- if (ret)
- return ret;
-
trng->hclk = devm_clk_get(&pdev->dev, "hclk");
if (IS_ERR(trng->hclk))
return dev_err_probe(&pdev->dev, PTR_ERR(trng->hclk),
@@ -320,9 +439,14 @@ static int starfive_trng_probe(struct platform_device *pdev)
return dev_err_probe(&pdev->dev, PTR_ERR(trng->rst),
"Error getting hardware reset line\n");
- clk_prepare_enable(trng->hclk);
- clk_prepare_enable(trng->ahb);
- reset_control_deassert(trng->rst);
+ init_completion(&trng->random_done);
+ init_completion(&trng->reseed_done);
+ mutex_init(&trng->lock);
+ INIT_WORK(&trng->work, starfive_trng_randreseed_work);
+
+ trng->irq = platform_get_irq(pdev, 0);
+ if (trng->irq < 0)
+ return trng->irq;
trng->rng.name = dev_driver_string(&pdev->dev);
trng->rng.init = starfive_trng_init;
@@ -333,40 +457,86 @@ static int starfive_trng_probe(struct platform_device *pdev)
trng->mission = 1;
trng->reseed = RANDOM_RESEED;
- pm_runtime_use_autosuspend(&pdev->dev);
- pm_runtime_set_autosuspend_delay(&pdev->dev, 100);
- pm_runtime_enable(&pdev->dev);
+ ret = clk_prepare_enable(trng->hclk);
+ if (ret) {
+ dev_err(&pdev->dev, "hclk clk_enable failed: %d\n", ret);
+ return ret;
+ }
- ret = devm_hwrng_register(&pdev->dev, &trng->rng);
+ ret = clk_prepare_enable(trng->ahb);
if (ret) {
- pm_runtime_disable(&pdev->dev);
+ clk_disable_unprepare(trng->hclk);
+ dev_err(&pdev->dev, "ahb clk_enable failed: %d\n", ret);
+ return ret;
+ }
- reset_control_assert(trng->rst);
+ ret = reset_control_deassert(trng->rst);
+ if (ret) {
clk_disable_unprepare(trng->ahb);
clk_disable_unprepare(trng->hclk);
+ dev_err(&pdev->dev, "failed to deassert trng\n");
+ return ret;
+ }
- return dev_err_probe(&pdev->dev, ret, "Failed to register hwrng\n");
+ pm_runtime_use_autosuspend(&pdev->dev);
+ pm_runtime_set_autosuspend_delay(&pdev->dev, 100);
+ devm_pm_runtime_set_active_enabled(&pdev->dev);
+
+ ret = devm_request_irq(&pdev->dev, trng->irq, starfive_trng_irq, 0, pdev->name,
+ (void *)trng);
+ if (ret) {
+ starfive_trng_release(trng);
+ return dev_err_probe(&pdev->dev, ret, "Failed to register interrupt handler\n");
}
+ ret = devm_add_action_or_reset(&pdev->dev, starfive_trng_release, trng);
+ if (ret)
+ return ret;
+
+ ret = devm_hwrng_register(&pdev->dev, &trng->rng);
+ if (ret)
+ return dev_err_probe(&pdev->dev, ret, "Failed to register hwrng\n");
+
return 0;
}
static int __maybe_unused starfive_trng_suspend(struct device *dev)
{
struct starfive_trng *trng = dev_get_drvdata(dev);
+ bool cleanup = READ_ONCE(trng->cleanup);
+
+ if (cleanup && trng->data->seq_rst_clk == SEQ_RST_FIRST)
+ reset_control_assert(trng->rst);
- clk_disable_unprepare(trng->hclk);
clk_disable_unprepare(trng->ahb);
+ clk_disable_unprepare(trng->hclk);
+
+ if (cleanup && trng->data->seq_rst_clk == SEQ_CLK_FIRST)
+ reset_control_assert(trng->rst);
return 0;
}
static int __maybe_unused starfive_trng_resume(struct device *dev)
{
+ int ret;
struct starfive_trng *trng = dev_get_drvdata(dev);
- clk_prepare_enable(trng->hclk);
- clk_prepare_enable(trng->ahb);
+ ret = clk_prepare_enable(trng->hclk);
+ if (ret) {
+ dev_err(trng->dev, "hclk clk_enable failed: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_prepare_enable(trng->ahb);
+ if (ret) {
+ clk_disable_unprepare(trng->hclk);
+ dev_err(trng->dev, "ahb clk_enable failed: %d\n", ret);
+ return ret;
+ }
+
+ if (READ_ONCE(trng->cleanup))
+ reset_control_deassert(trng->rst);
return 0;
}
@@ -378,8 +548,17 @@ static const struct dev_pm_ops starfive_trng_pm_ops = {
starfive_trng_resume, NULL)
};
-static const struct of_device_id trng_dt_ids[] __maybe_unused = {
- { .compatible = "starfive,jh7110-trng" },
+static const struct starfive_trng_data jh7110_data = {
+ .seq_rst_clk = SEQ_RST_FIRST,
+};
+
+static const struct starfive_trng_data jhb100_data = {
+ .seq_rst_clk = SEQ_CLK_FIRST,
+};
+
+static const struct of_device_id trng_dt_ids[] = {
+ { .compatible = "starfive,jh7110-trng", .data = &jh7110_data },
+ { .compatible = "starfive,jhb100-trng", .data = &jhb100_data },
{ }
};
MODULE_DEVICE_TABLE(of, trng_dt_ids);
@@ -389,7 +568,7 @@ static struct platform_driver starfive_trng_driver = {
.driver = {
.name = "jh7110-trng",
.pm = &starfive_trng_pm_ops,
- .of_match_table = of_match_ptr(trng_dt_ids),
+ .of_match_table = trng_dt_ids,
},
};
--
2.43.0
next prev parent reply other threads:[~2026-09-07 4:50 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-07 3:16 [PATCH v8 0/2] hwrng: starfive: add JHB100 support and fix clk/reset teardown lianfeng.ouyang
2026-09-07 3:16 ` [PATCH v8 1/2] dt-bindings: rng: starfive,jh7110-trng: add jhb100, drop jh8100 lianfeng.ouyang
2026-09-07 3:16 ` lianfeng.ouyang [this message]
2026-09-07 5:04 ` [PATCH v8 2/2] hwrng: starfive: rework clk/reset teardown order for JHB100 sashiko-bot
2026-09-08 8:55 ` 回复: " Lianfeng Ouyang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260907031603.188483-3-lianfeng.ouyang@starfivetech.com \
--to=lianfeng.ouyang@starfivetech.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=herbert@gondor.apana.org.au \
--cc=krzk+dt@kernel.org \
--cc=linux-crypto@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=olivia@selenic.com \
--cc=p.zabel@pengutronix.de \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.