Re: [PATCH v2 12/17] KVM: arm64: Add per-EC entry/exit state marshalling for protected guests

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Dead fallback code due to EL2 WARN_ON panic semantics
--

commit e6a23fd729ce9b1a6ab9652bdfcd06dd180d6ce8
Author: Fuad Tabba <fuad.tabba@linux.dev>

KVM: arm64: Add per-EC entry/exit state marshalling for protected guests

This commit introduces per-EC entry and exit state marshalling for protected
guests. It routes protected guests through specific entry and exit handlers
to copy only the necessary context rather than the entire context between the
host and the hyp vCPU.

> diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c b/arch/arm64/kvm/hyp/nvhe/hyp-main.c
> index 1a3f23e90e563..2015bf5ce6287 100644
> --- a/arch/arm64/kvm/hyp/nvhe/hyp-main.c
> +++ b/arch/arm64/kvm/hyp/nvhe/hyp-main.c

[ ... ]

> @@ -34,13 +38,342 @@ void __kvm_hyp_host_forward_smc(struct kvm_cpu_context *host_ctxt);

[ ... ]

> +static void handle_pvm_entry_hvc64(struct pkvm_hyp_vcpu *hyp_vcpu)
> +{
> +	u64 ret = READ_ONCE(hyp_vcpu->host_vcpu->arch.ctxt.regs.regs[0]);
> +	u32 psci_fn = smccc_get_function(&hyp_vcpu->vcpu);
> +
> +	switch (psci_fn) {
> +	case PSCI_0_2_FN_CPU_ON:
> +	case PSCI_0_2_FN64_CPU_ON:
> +		/*
> +		 * Roll back a CPU_ON the host failed, unless the target
> +		 * already reached ON: it is running, and the guest sees
> +		 * SUCCESS.
> +		 */
> +		if (ret != PSCI_RET_SUCCESS) {
> +			unsigned long cpu_id = smccc_get_arg1(&hyp_vcpu->vcpu);
> +			struct pkvm_hyp_vcpu *target_vcpu;
> +			struct pkvm_hyp_vm *hyp_vm;
> +			int prev;
> +
> +			hyp_vm = pkvm_hyp_vcpu_to_hyp_vm(hyp_vcpu);
> +			target_vcpu = pkvm_mpidr_to_hyp_vcpu(hyp_vm, cpu_id);
> +
> +			/*
> +			 * pvm_psci_vcpu_on() resolved this MPIDR and vcpus[]
> +			 * entries are never removed, so the lookup cannot miss.
> +			 */
> +			if (WARN_ON(!target_vcpu)) {
> +				ret = PSCI_RET_INTERNAL_FAILURE;
> +				break;
> +			}

[Severity: Low]
Is the fallback error handling unreachable here?

At EL2 in nVHE/pKVM, WARN_ON evaluates to a BRK instruction which panics the
hypervisor. There is no warn-and-continue behavior in this context. If
target_vcpu evaluates to NULL, the hypervisor will panic immediately, leaving
the fallback assignment to PSCI_RET_INTERNAL_FAILURE and the break statement
entirely dead code.

> +
> +			prev = cmpxchg_relaxed(&target_vcpu->power_state,
> +					       PSCI_0_2_AFFINITY_LEVEL_ON_PENDING,
> +					       PSCI_0_2_AFFINITY_LEVEL_OFF);

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260907070002.3333525-1-fuad.tabba@linux.dev?part=12