From: sashiko-bot@kernel.org
To: "Taniya Das" <taniya.das@oss.qualcomm.com>
Cc: linux-clk@vger.kernel.org, conor+dt@kernel.org, robh@kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH 3/3] clk: qcom: dprxcc: Add Nord DPRX clock controller support
Date: Mon, 07 Sep 2026 08:55:15 +0000 [thread overview]
Message-ID: <20260907085516.0C1281F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260907-nords_dprx-v1-3-d472af3f01b1@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Missing `.use_rpm = true` causes register accesses while the power domain is disabled.
--
commit f58a0767efa8984edb8bffb65390c86a685205cd
Author: Taniya Das <taniya.das@oss.qualcomm.com>
clk: qcom: dprxcc: Add Nord DPRX clock controller support
Add support for the DisplayPort Receiver (DPRX) clock controllers on
Nord devices. There are two identical DPRX clock controller
instances (DPRX0 and DPRX1), each providing clocks for the DPRX core,
audio, AHB and video memory paths, along with core PLLs.
> diff --git a/drivers/clk/qcom/dprxcc0-nord.c b/drivers/clk/qcom/dprxcc0-nord.c
> new file mode 100644
> index 0000000000000..85cfa8f3be26b
> --- /dev/null
> +++ b/drivers/clk/qcom/dprxcc0-nord.c
[ ... ]
> +static const struct qcom_cc_desc dprx_cc_0_nord_desc = {
> + .config = &dprx_cc_0_nord_regmap_config,
> + .clks = dprx_cc_0_nord_clocks,
> + .num_clks = ARRAY_SIZE(dprx_cc_0_nord_clocks),
> + .resets = dprx_cc_0_nord_resets,
> + .num_resets = ARRAY_SIZE(dprx_cc_0_nord_resets),
> + .driver_data = &dprx_cc_0_nord_driver_data,
> +};
[Severity: High]
Should .use_rpm = true be set in dprx_cc_0_nord_desc?
During device probe, qcom_cc_really_probe() directly calls
dprx_cc_0_nord_regs_configure(), which executes regmap_write() to hardware
registers. Without setting .use_rpm to true, the driver core does not call
pm_runtime_resume_and_get() to enable the device power domain prior to
these writes. Can this lead to a system crash (external abort) when
accessing unclocked hardware registers?
> diff --git a/drivers/clk/qcom/dprxcc1-nord.c b/drivers/clk/qcom/dprxcc1-nord.c
> new file mode 100644
> index 0000000000000..573d66bb97c90
> --- /dev/null
> +++ b/drivers/clk/qcom/dprxcc1-nord.c
[ ... ]
> +static const struct qcom_cc_desc dprx_cc_1_nord_desc = {
> + .config = &dprx_cc_1_nord_regmap_config,
> + .clks = dprx_cc_1_nord_clocks,
> + .num_clks = ARRAY_SIZE(dprx_cc_1_nord_clocks),
> + .resets = dprx_cc_1_nord_resets,
> + .num_resets = ARRAY_SIZE(dprx_cc_1_nord_resets),
> + .driver_data = &dprx_cc_1_nord_driver_data,
> +};
[Severity: High]
Does dprx_cc_1_nord_desc also need .use_rpm = true?
Similar to dprx_cc_0_nord_desc above, without enabling the power
domain, calling dprx_cc_1_nord_regs_configure() during probe could cause a
crash when writing to unclocked hardware registers.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260907-nords_dprx-v1-0-d472af3f01b1@oss.qualcomm.com?part=3
next prev parent reply other threads:[~2026-09-07 8:55 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-07 8:26 [PATCH 0/3] clk: qcom: Add Nord DPRX clock controller support Taniya Das
2026-09-07 8:26 ` [PATCH 1/3] clk: qcom: clk-alpha-pll: support a 28-bit ALPHA_VAL width Taniya Das
2026-09-07 8:38 ` sashiko-bot
2026-09-07 10:30 ` Abel Vesa
2026-09-09 8:41 ` Shawn Guo
2026-09-10 8:10 ` Taniya Das
2026-09-07 8:26 ` [PATCH 2/3] dt-bindings: clock: qcom: document the Nord DPRX Clock Controller Taniya Das
2026-09-07 8:35 ` sashiko-bot
2026-09-07 10:38 ` Abel Vesa
2026-09-09 8:31 ` Shawn Guo
2026-09-10 8:55 ` Taniya Das
2026-09-07 8:26 ` [PATCH 3/3] clk: qcom: dprxcc: Add Nord DPRX clock controller support Taniya Das
2026-09-07 8:55 ` sashiko-bot [this message]
2026-09-07 10:43 ` Abel Vesa
2026-09-09 9:06 ` Shawn Guo
2026-09-10 9:08 ` Taniya Das
2026-09-09 8:34 ` [PATCH 0/3] clk: qcom: " Shawn Guo
2026-09-10 8:14 ` Taniya Das
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260907085516.0C1281F00A3A@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=robh@kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
--cc=taniya.das@oss.qualcomm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.