All of lore.kernel.org
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "Harendra Gautam" <harendra.gautam@oss.qualcomm.com>
Cc: robh@kernel.org, devicetree@vger.kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v5 01/10] ASoC: dt-bindings: qcom,shikra-qaif-cpu: Add binding
Date: Mon, 07 Sep 2026 12:20:22 +0000	[thread overview]
Message-ID: <20260907122022.A77F71F00A3D@smtp.kernel.org> (raw)
In-Reply-To: <20260907-b4-qaif-shikra-audio-v5-1-6d8ad9ba5c9f@oss.qualcomm.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The AIF child node uses a directional DAI ID as its 'reg' but mandates bidirectional configuration properties, creating a structural conflict.
--

commit 1e68cced9250cf9fdfbb8cdc27ee8ec47ada4a87
Author: Harendra Gautam <harendra.gautam@oss.qualcomm.com>

ASoC: dt-bindings: qcom,shikra-qaif-cpu: Add binding

Add the Devicetree binding for the Qualcomm Audio Interface (QAIF) CPU DAI
controller used on the Shikra audio platform, together with a dt-bindings
header for QAIF DAI and AIF interface IDs.

> diff --git a/Documentation/devicetree/bindings/sound/qcom,shikra-qaif-cpu.yaml b/Documentation/devicetree/bindings/sound/qcom,shikra-qaif-cpu.yaml
> new file mode 100644
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/qcom,shikra-qaif-cpu.yaml

[ ... ]

> +    properties:
> +      reg:
> +        maxItems: 1
> +        description:
> +          DAI ID of the AIF interface (QAIF_MI2S_AIF* or QAIF_TDM_AIF*).

[ ... ]

> +      qcom,qaif-aif-lane-map:
> +        $ref: /schemas/types.yaml#/definitions/uint32-array
> +        description:
> +          Per-lane direction map, one entry per lane starting from lane 0.
> +          Use 0 for TX (output/speaker) and 1 for RX (input/mic).

[ ... ]

> +    if:
> +      properties:
> +        dai-format:
> +          enum: [dsp_a, dsp_b]
> +    then:
> +      required:
> +        - dai-tdm-slot-width
> +        - dai-tdm-slot-num
> +        - dai-tdm-slot-rx-mask
> +        - dai-tdm-slot-tx-mask

[Severity: Medium]
Does this binding structure create a conflict for bidirectional interfaces?

Since the reg property requires a strictly directional DAI ID (like
AIF_TDM_RX_2), but the schema configures a bidirectional lane map and mandates
both dai-tdm-slot-rx-mask and dai-tdm-slot-tx-mask for DSP formats, this
appears to force both directions into a single node.

Looking at the driver in sound/soc/qcom/qaif-cpu.c, the function
of_qaif_parse_aif_intf_cfg() also prevents multiple nodes for the same physical
interface:

		if (configured_intf_mask & BIT(intf_idx)) {
			dev_err(dev, "Duplicate reg %d for interface %pOFn\n",
				dai_id, intf_np);
			of_node_put(intf_np);
			return -EINVAL;
		}

Does this force a bidirectional node to arbitrarily choose either the RX or
TX DAI ID for its reg property, preventing an accurate description of the
hardware?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260907-b4-qaif-shikra-audio-v5-0-6d8ad9ba5c9f@oss.qualcomm.com?part=1

  reply	other threads:[~2026-09-07 12:20 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-07 12:09 [PATCH v5 00/10] ASoC: qcom: Add QAIF driver for Shikra audio platform Harendra Gautam
2026-09-07 12:09 ` [PATCH v5 01/10] ASoC: dt-bindings: qcom,shikra-qaif-cpu: Add binding Harendra Gautam
2026-09-07 12:20   ` sashiko-bot [this message]
2026-09-08 19:49   ` Mark Brown
2026-09-09  6:26     ` Harendra Gautam
2026-09-07 12:09 ` [PATCH v5 02/10] ASoC: qcom: Add QAIF shared data structures and variant interface Harendra Gautam
2026-09-07 12:09 ` [PATCH v5 03/10] ASoC: qcom: Add QAIF hardware register map Harendra Gautam
2026-09-07 12:23   ` sashiko-bot
2026-09-07 12:09 ` [PATCH v5 04/10] ASoC: qcom: Add QAIF CPU DAI ops, regmap, DT parsing and platform init Harendra Gautam
2026-09-07 12:25   ` sashiko-bot
2026-09-07 12:09 ` [PATCH v5 05/10] ASoC: soc-core: Add snd_soc_of_xlate_dai_name() generic helper Harendra Gautam
2026-09-07 12:09 ` [PATCH v5 06/10] ASoC: qcom: Switch lpass-cpu and qaif-cpu to snd_soc_of_xlate_dai_name() Harendra Gautam
2026-09-07 12:09 ` [PATCH v5 07/10] ASoC: qcom: Add QAIF PCM operations Harendra Gautam
2026-09-07 12:38   ` sashiko-bot
2026-09-07 12:09 ` [PATCH v5 08/10] ASoC: qcom: Add QAIF IRQ handling, suspend/resume and platform register Harendra Gautam
2026-09-07 12:36   ` sashiko-bot
2026-09-07 12:09 ` [PATCH v5 09/10] ASoC: qcom: Add Shikra QAIF support Harendra Gautam
2026-09-07 12:42   ` sashiko-bot
2026-09-07 12:09 ` [PATCH v5 10/10] MAINTAINERS: Add Qualcomm QAIF driver entry Harendra Gautam
2026-09-08 19:54 ` [PATCH v5 00/10] ASoC: qcom: Add QAIF driver for Shikra audio platform Mark Brown
2026-09-09  6:33   ` Harendra Gautam

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260907122022.A77F71F00A3D@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=harendra.gautam@oss.qualcomm.com \
    --cc=robh@kernel.org \
    --cc=sashiko-reviews@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.