From: sashiko-bot@kernel.org
To: "Dibin Moolakadan Subrahmanian"
<dibin.moolakadan.subrahmanian@intel.com>
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3 2/2] drm/i915/dmc: Harden DMC firmware payload parsing
Date: Mon, 07 Sep 2026 14:06:52 +0000 [thread overview]
Message-ID: <20260907140653.7449E1F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260907135048.1403587-6-dibin.moolakadan.subrahmanian@intel.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] Partial initialization of `dmc_info` on payload allocation failure leaves a stale `mmio_count`, leading to unintended hardware MMIO programming for missing firmwares.
--
commit bbb6b21d216798e993d4045cdf8b46c4ba305c9b
Author: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
drm/i915/dmc: Harden DMC firmware payload parsing
This commit validates the DMC firmware size conversion using
check_mul_overflow() to prevent integer overflow. It also rejects zero-length
payloads and zero MMIO counts, and delays setting dmc_fw_size until after the
payload allocation succeeds.
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
[ ... ]
> @@ -1237,12 +1247,12 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc,
> dmc_info->mmio_count = mmio_count;
> dmc_info->start_mmioaddr = start_mmioaddr;
>
> - dmc_info->dmc_fw_size = dmc_header->fw_size;
> -
> dmc_info->payload = kmalloc(payload_size, GFP_KERNEL);
> if (!dmc_info->payload)
> return 0;
[Severity: High]
This is a pre-existing issue, but partial initialization of dmc_info here
leaves a stale mmio_count on allocation failure.
Since this patch already moves the dmc_fw_size assignment below the kmalloc
check to avoid leaving stale state, should mmio_count and start_mmioaddr be
moved down as well?
If kmalloc() fails, parse_dmc_fw_header() returns 0 but leaves
dmc_info->mmio_count set to a non-zero value. Later in the firmware loading
sequence, intel_dmc_load_program() will proceed to call dmc_load_program()
for the failed secondary DMC, where it calls:
drivers/gpu/drm/i915/display/intel_dmc.c:dmc_load_program() {
...
dmc_load_mmio(display, dmc_id);
...
}
Does this cause dmc_load_mmio() to iterate up to the stale mmio_count and
write the partially initialized mmiodata to hardware registers for a
firmware payload that was never loaded?
> + dmc_info->dmc_fw_size = dmc_header->fw_size;
> +
> payload = (u8 *)(dmc_header) + header_len_bytes;
> memcpy(dmc_info->payload, payload, payload_size);
>
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260907135048.1403587-4-dibin.moolakadan.subrahmanian@intel.com?part=2
next prev parent reply other threads:[~2026-09-07 14:06 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-07 13:50 [PATCH v3 0/2] Add validation for DMC firmware header parsing Dibin Moolakadan Subrahmanian
2026-09-07 13:50 ` [PATCH v3 1/2] drm/i915/dmc: Add sanity check for DMC load address Dibin Moolakadan Subrahmanian
2026-09-07 13:50 ` [PATCH v3 2/2] drm/i915/dmc: Harden DMC firmware payload parsing Dibin Moolakadan Subrahmanian
2026-09-07 14:06 ` sashiko-bot [this message]
2026-09-07 14:41 ` ✓ CI.KUnit: success for Add validation for DMC firmware header parsing (rev3) Patchwork
2026-09-07 15:30 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-09-07 16:01 ` ✓ i915.CI.BAT: success for Add validation for DMC firmware header parsing (rev4) Patchwork
2026-09-07 18:16 ` ✗ Xe.CI.FULL: failure for Add validation for DMC firmware header parsing (rev3) Patchwork
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