From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3629BC79FA1 for ; Mon, 7 Sep 2026 16:41:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=vOcosIoOZUylABIr2H2Dhy/0SsM1lRvXoK46nuhzuCs=; b=3bC4v7/kzVmh6qyTmqUNRwFVtx yHg5TiLWCR5tgsuXOFg5o83+tioza1IgFQv2vcVXJlblSMbLrMAewlngW78UE8QtsRK15n+RREwSp ezeAgo0cmMzGDOA9zzWAqrQGoKz0py17EkwQ0IqOkGYYUa4aERjNAxKxF9oANB9UwmYSQf87FhQrz 6XZfK+CynAnUxmmNxKK+F2ooSptOWZLhi0Vdl7uDz/JlmCvZezNkGDq/vhiPxYd77uZmbMspuUmXA +bkZlaNhmg1eUvQH1z2MfJuUpM1CNDh00JBMSOpC0JooVeT37cYcJ6DfFgBYEWIo9LTLDw5erVNBh LCSgJw/g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1x3cPE-00000007Le6-12Rk; Mon, 07 Sep 2026 16:41:16 +0000 Received: from tor.source.kernel.org ([172.105.4.254]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1x3cP8-00000007LXU-2Ti7 for linux-arm-kernel@lists.infradead.org; Mon, 07 Sep 2026 16:41:10 +0000 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by tor.source.kernel.org (Postfix) with ESMTP id 04135601DE; Mon, 7 Sep 2026 16:41:10 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 62F081F00ADB; Mon, 7 Sep 2026 16:41:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1788799269; bh=vOcosIoOZUylABIr2H2Dhy/0SsM1lRvXoK46nuhzuCs=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=iOkITSghGleQZW/uuzPixqRARqkNrb+Gcku9ztKJFGvgPMGdTwTM3VGf67kBXUwvB VHLuMowJNNEC4rw38yEj4iZ0j9yjq7WKSIdAWHl+qUDp1Xo6tl9gKsbSQRSftocDjJ P8QDk2bNG5gWsnRdjAEx9t1NAloDA/AkmHktxDRK1xj7izXzRJciUpKFEt6nU3TBd7 /Q+5ToQHPwvWPLWx6AVZqg2A0J8sPyuworDM0u6tPs0vnlpkwZwPCho7v6sssFfdwT hIJKMyyALF308ik//Ps1QVHGBwStx2Aci6hBKk/JuvE6Cnd7wNGk1SQH5+IqneMK7i HyKZuJpY3Vl8Q== From: Will Deacon To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Will Deacon , Thomas Gleixner , Catalin Marinas , Borislav Petkov , Lorenzo Pieralisi , Jinjie Ruan , Mark Rutland , David Woodhouse , Peter Zijlstra , Marc Zyngier Subject: [PATCH 12/19] arm64: cpu_ops: Make 'cpu_operations' pointer global instead of per-cpu Date: Mon, 7 Sep 2026 17:40:15 +0100 Message-ID: <20260907164024.17164-13-will@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260907164024.17164-1-will@kernel.org> References: <20260907164024.17164-1-will@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org 'cpu_ops' is an NR_CPUS-length array of 'cpu_operations' pointers, which theoretically allows for different CPUs to have different bringup and hotplug backends. In reality, this complexity exists only to deal with the case where CPU0 is not hotpluggable, so replace the array with a single, global pointer and record separately whether or not they apply to the boot CPU. Update the logic in init_cpu_ops() to enforce that only a single set of 'cpu_ops' is required. Signed-off-by: Will Deacon --- arch/arm64/kernel/cpu_ops.c | 29 ++++++++++++++++++++--------- 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/arch/arm64/kernel/cpu_ops.c b/arch/arm64/kernel/cpu_ops.c index e133011f64b5..eacfb88a0c0c 100644 --- a/arch/arm64/kernel/cpu_ops.c +++ b/arch/arm64/kernel/cpu_ops.c @@ -20,7 +20,8 @@ extern const struct cpu_operations acpi_parking_protocol_ops; #endif extern const struct cpu_operations cpu_psci_ops; -static const struct cpu_operations *cpu_ops[NR_CPUS] __ro_after_init; +static const struct cpu_operations *cpu_ops __ro_after_init; +static bool boot_cpu_has_enable_method __ro_after_init; static const struct cpu_operations *const dt_supported_cpu_ops[] __initconst = { &smp_spin_table_ops, @@ -40,6 +41,9 @@ static const struct cpu_operations * __init cpu_get_ops(const char *name) { const struct cpu_operations *const *ops; + if (!name) + return NULL; + ops = acpi_disabled ? dt_supported_cpu_ops : acpi_supported_cpu_ops; while (*ops) { @@ -49,6 +53,7 @@ static const struct cpu_operations * __init cpu_get_ops(const char *name) ops++; } + pr_warn("Unsupported enable-method: %s\n", name); return NULL; } @@ -94,25 +99,31 @@ static const char *__init cpu_read_enable_method(int cpu) return enable_method; } /* - * Read a cpu's enable method and record it in cpu_ops. + * Read a cpu's enable method and update/check cpu_ops. */ int __init init_cpu_ops(int cpu) { const char *enable_method = cpu_read_enable_method(cpu); + const struct cpu_operations *ops = cpu_get_ops(enable_method); - if (!enable_method) + if (!ops) return -ENODEV; - cpu_ops[cpu] = cpu_get_ops(enable_method); - if (!cpu_ops[cpu]) { - pr_warn("Unsupported enable-method: %s\n", enable_method); - return -EOPNOTSUPP; - } + if (!cpu_ops) + cpu_ops = ops; + else if (cpu_ops != ops) + return -EBUSY; + + if (cpu == 0) + boot_cpu_has_enable_method = true; return 0; } const struct cpu_operations *get_cpu_ops(int cpu) { - return cpu_ops[cpu]; + if (cpu || boot_cpu_has_enable_method) + return cpu_ops; + + return NULL; } -- 2.55.0.979.g7e5102b832-goog