[PATCH] riscv: vector: Fix data pointer constraints in context save/restore

From: Troy Mitchell <troy.mitchell@linux.dev>
To: "Paul Walmsley" <pjw@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Guo Ren" <guoren@kernel.org>, "Andy Chiu" <andybnac@gmail.com>,
	"Vincent Chen" <vincent.chen@sifive.com>,
	"Björn Töpel" <bjorn@rivosinc.com>
Cc: Alexandre Ghiti <alex@ghiti.fr>,
	linux-riscv@lists.infradead.org,  linux-kernel@vger.kernel.org,
	Palmer Dabbelt <palmer@rivosinc.com>,
	 Greentime Hu <greentime.hu@sifive.com>,
	Heiko Stuebner <heiko@sntech.de>,
	 Conor Dooley <conor.dooley@microchip.com>,
	 Kevin Zhang <zhangmeng.kevin@linux.spacemit.com>,
	 Troy Mitchell <troy.mitchell@linux.dev>
Subject: [PATCH] riscv: vector: Fix data pointer constraints in context save/restore
Date: Tue, 08 Sep 2026 21:03:37 +0800	[thread overview]
Message-ID: <20260908-riscv-vector-asm-fix-v1-1-147f314efb2b@linux.dev> (raw)

The standard vector save/restore asm advances datap but declares it as
input-only. An inlined caller reusing the original pointer may therefore
use the advanced address instead.

Declare datap as read-write so the compiler can preserve the original
pointer when needed.

Fixes: 03c3fcd9941a ("riscv: Introduce struct/helpers to save/restore per-task Vector state")
Signed-off-by: Troy Mitchell <troy.mitchell@linux.dev>
---
 arch/riscv/include/asm/vector.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/include/asm/vector.h b/arch/riscv/include/asm/vector.h
index fffe72a772080..c7fd6d50a7a47 100644
--- a/arch/riscv/include/asm/vector.h
+++ b/arch/riscv/include/asm/vector.h
@@ -230,7 +230,7 @@ static inline void __riscv_v_vstate_save(struct __riscv_v_ext_state *save_to,
 			"add		%1, %1, %0\n\t"
 			"vse8.v		v24, (%1)\n\t"
 			".option pop\n\t"
-			: "=&r" (vl) : "r" (datap) : "memory");
+			: "=&r" (vl), "+r" (datap) : : "memory");
 	}
 	riscv_v_disable();
 }
@@ -266,7 +266,7 @@ static inline void __riscv_v_vstate_restore(struct __riscv_v_ext_state *restore_
 			"add		%1, %1, %0\n\t"
 			"vle8.v		v24, (%1)\n\t"
 			".option pop\n\t"
-			: "=&r" (vl) : "r" (datap) : "memory");
+			: "=&r" (vl), "+r" (datap) : : "memory");
 	}
 	__vstate_csr_restore(restore_from);
 	riscv_v_disable();

---
base-commit: cee9395acd8043be0644b25c34bfa86623f2b935
change-id: 20260908-riscv-vector-asm-fix-27ed36623934

Best regards,
--  
Troy Mitchell <troy.mitchell@linux.dev>


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