From: Karthik S <karthik.s@oss.qualcomm.com>
To: Bartosz Golaszewski <brgl@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Linus Walleij <linusw@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Karthik S <karthik.s@oss.qualcomm.com>
Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v1 1/2] dt-bindings: pinctrl: qcom: Add QCS615 LPASS LPI pinctrl bindings
Date: Tue, 8 Sep 2026 13:28:53 +0530 [thread overview]
Message-ID: <20260908075854.3015560-2-karthik.s@oss.qualcomm.com> (raw)
In-Reply-To: <20260908075854.3015560-1-karthik.s@oss.qualcomm.com>
Add bindings for the pin controller in the QCS615 Low Power Audio
SubSystem (LPASS) Low Power Island (LPI).
The LPASS LPI TLMM is a dedicated pin controller for audio pins on
QCS615 which supports 32 GPIOs (gpio0-gpio31) with functions including
i2s1, dmic1, dmic2 and spkr_i2s_mclk_a.
Signed-off-by: Karthik S <karthik.s@oss.qualcomm.com>
---
.../qcom,qcs615-lpass-lpi-pinctrl.yaml | 114 ++++++++++++++++++
1 file changed, 114 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,qcs615-lpass-lpi-pinctrl.yaml
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,qcs615-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,qcs615-lpass-lpi-pinctrl.yaml
new file mode 100644
index 000000000000..dc1525d7bf55
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,qcs615-lpass-lpi-pinctrl.yaml
@@ -0,0 +1,114 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/qcom,qcs615-lpass-lpi-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm QCS615 SoC LPASS LPI TLMM
+
+maintainers:
+ - Karthik S <karthik.s@oss.qualcomm.com>
+
+description:
+ Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
+ (LPASS) Low Power Island (LPI) of Qualcomm QCS615 SoC.
+
+properties:
+ compatible:
+ const: qcom,qcs615-lpass-lpi-pinctrl
+
+ reg:
+ items:
+ - description: LPASS LPI TLMM Control and Status registers
+ - description: LPASS LPI MCC registers
+
+ clocks:
+ items:
+ - description: LPASS Core voting clock
+
+ clock-names:
+ items:
+ - const: core
+
+patternProperties:
+ "-state$":
+ oneOf:
+ - $ref: "#/$defs/qcom-qcs615-lpass-state"
+ - patternProperties:
+ "-pins$":
+ $ref: "#/$defs/qcom-qcs615-lpass-state"
+ additionalProperties: false
+
+$defs:
+ qcom-qcs615-lpass-state:
+ type: object
+ description:
+ Pinctrl node's client devices use subnodes for desired pin configuration.
+ Client device subnodes use below standard properties.
+ $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
+ unevaluatedProperties: false
+
+ properties:
+ pins:
+ description:
+ List of gpio pins affected by the properties specified in this
+ subnode.
+ items:
+ pattern: "^gpio([0-9]|1[0-9]|2[0-9]|3[0-1])$"
+
+ function:
+ enum: [ dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, gpio, i2s1_clk,
+ i2s1_data, i2s1_ws, spkr_i2s_mclk_a ]
+ description:
+ Specify the alternative function to be configured for the specified
+ pins.
+
+allOf:
+ - $ref: qcom,lpass-lpi-common.yaml#
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/sound/qcom,q6afe.h>
+ lpi_tlmm: pinctrl@62b40000 {
+ compatible = "qcom,qcs615-lpass-lpi-pinctrl";
+ reg = <0x62b40000 0x20000>,
+ <0x62b00000 0x10000>;
+ clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ clock-names = "core";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&lpi_tlmm 0 0 32>;
+
+ i2s1-active-state {
+ clk-pins {
+ pins = "gpio8";
+ function = "i2s1_clk";
+ drive-strength = <8>;
+ bias-disable;
+ output-high;
+ };
+
+ ws-pins {
+ pins = "gpio9";
+ function = "i2s1_ws";
+ drive-strength = <8>;
+ bias-disable;
+ output-high;
+ };
+
+ data-pins {
+ pins = "gpio10", "gpio11";
+ function = "i2s1_data";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ };
+ };
--
2.34.1
next prev parent reply other threads:[~2026-09-08 7:59 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-08 7:58 [PATCH v1 0/2] pinctrl: qcom: Add QCS615 LPASS LPI pinctrl support Karthik S
2026-09-08 7:58 ` Karthik S [this message]
2026-09-08 7:58 ` [PATCH v1 2/2] pinctrl: qcom: Add qcs615 lpass lpi pinctrl driver Karthik S
2026-09-08 8:11 ` sashiko-bot
2026-09-08 13:02 ` Konrad Dybcio
2026-09-17 12:05 ` Karthik S
2026-09-18 11:31 ` Karthik S
2026-09-08 14:58 ` Krzysztof Kozlowski
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