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Tue, 8 Sep 2026 06:35:33 -0500 From: Chenyu Chen To: CC: Harry Wentland , Leo Li , Aurabindo Pillai , Roman Li , Wayne Lin , Tom Chung , "Fangzhi Zuo" , Dan Wheeler , Ray Wu , Ivan Lipski , Alex Hung , James Lin , Chenyu Chen , Bhawanpreet Lakha , "Chenyu Chen" Subject: [PATCH 13/66] drm/amd/display: Test pre-GFX9 plane buffer attributes Date: Tue, 8 Sep 2026 19:31:06 +0800 Message-ID: <20260908113338.2433445-14-chen-yu.chen@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260908113338.2433445-1-chen-yu.chen@amd.com> References: <20260908113338.2433445-1-chen-yu.chen@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF0000A894:EE_|SA3PR12MB8438:EE_ X-MS-Office365-Filtering-Correlation-Id: 92bb5b80-23ac-4ac0-0566-08df0d9d50a8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|376014|36860700016|23010399003|1800799024|82310400026|10067099003|56012099006|11063799006|22082099003|18002099003; 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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: v5SzGOD9/cW0UJ3l4hpUL2u7zGi6Tp0zaASg0QlM11LkbWqzkZ1xR7g/6yP44/y/myL5bEeZIrlV9/poY5cbNopcnBXUdG7D5f/QLsCnDfLlVcbcSiwKr8Sh/nijXDAA8k8UJa6fUpC5/gQ5rSySVi6M5A+f4AvMWJ1BXXslyaV4fHr13bYtjjrzc9xNB00m71EET2mYNBJU7umvdUG4xc2crczbiYHNQC4LZS+lO7EbK4a84XRueUsXcpBg0XTSUN1mR+/M6PB2R9qcTXNgl50HaBOZbitc1qtmBGyN1KnKOnhymJa4UJoYmEomUt7nGPwsea6SmIclW/lTj5HVzTma9sPYeYRM1nUINLCHufH3SbJq+MElS3ivWrH3n6VtDwTkCiDiklYzScNDX4flz6WPE45n4/CW7+9wFzs11cm3rlWBvvpgOo6ko2Ld6NEJ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Sep 2026 11:35:42.3722 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 92bb5b80-23ac-4ac0-0566-08df0d9d50a8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF0000A894.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB8438 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" From: Alex Hung [WHAT] Add a KUnit test for amdgpu_dm_plane_fill_plane_buffer_attributes() covering the pre-Vega dispatch to the GFX6 modifier decoder. [HOW] Run a GFX6-family framebuffer through a 1D tiled modifier and check the decoded tiling version, then repeat with a GFX9 modifier to check that the decode error is propagated instead. Assisted-by: Copilot:Claude-Opus-5 Reviewed-by: Bhawanpreet Lakha Signed-off-by: Alex Hung Signed-off-by: Chenyu Chen --- .../amdgpu_dm/tests/amdgpu_dm_plane_test.c | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_plane_test.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_plane_test.c index 13e07c4fc0c7..9680c3fa8bc7 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_plane_test.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_plane_test.c @@ -3708,6 +3708,52 @@ static void dm_test_add_modifier_alloc_failure(struct kunit *test) KUNIT_EXPECT_EQ(test, size, 1ULL << 62); } +/** + * dm_test_fill_plane_buffer_attributes_gfx6() - Verify the pre-GFX9 dispatch. + * @test: KUnit test context. + * + * Verify if a pre-Vega family decodes tiling from the GFX6 modifier instead of + * taking the GFX9 or GFX12 modifier paths, and propagates the decode error for + * a modifier the GFX6 decoder does not understand. + */ +static void dm_test_fill_plane_buffer_attributes_gfx6(struct kunit *test) +{ + struct dc_tiling_info tiling_info = {0}; + struct dc_plane_dcc_param dcc = {0}; + struct dc_plane_address address = {0}; + struct plane_size plane_size = {0}; + struct amdgpu_framebuffer *afb; + struct amdgpu_device *adev; + + adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL); + afb = kunit_kzalloc(test, sizeof(*afb), GFP_KERNEL); + KUNIT_ASSERT_NOT_NULL(test, adev); + KUNIT_ASSERT_NOT_NULL(test, afb); + + adev->family = AMDGPU_FAMILY_CZ; + afb->address = 0x80000000ULL; + afb->base.width = 1920; + afb->base.height = 1080; + afb->base.pitches[0] = 7680; + afb->base.format = drm_format_info(DRM_FORMAT_XRGB8888); + KUNIT_ASSERT_NOT_NULL(test, afb->base.format); + afb->base.modifier = AMD_FMT_MOD | + AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX6) | + AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX6_1D_TILED_THIN1) | + AMD_FMT_MOD_SET(MICROTILE, AMD_FMT_MOD_MICROTILE_DISPLAY); + + KUNIT_EXPECT_EQ(test, dm_test_graphics_attrs(adev, afb, &tiling_info, + &plane_size, &dcc, &address), 0); + KUNIT_EXPECT_EQ(test, address.type, (int)PLN_ADDR_TYPE_GRAPHICS); + KUNIT_EXPECT_EQ(test, (int)tiling_info.gfxversion, (int)DcGfxVersion8); + + afb->base.modifier = AMD_FMT_MOD | + AMD_FMT_MOD_SET(TILE_VERSION, AMD_FMT_MOD_TILE_VER_GFX9); + + KUNIT_EXPECT_EQ(test, dm_test_graphics_attrs(adev, afb, &tiling_info, + &plane_size, &dcc, &address), -EINVAL); +} + static struct kunit_case amdgpu_dm_plane_test_cases[] = { /* amdgpu_dm_plane_is_video_format() */ KUNIT_CASE(dm_test_plane_is_video_format_known_video), @@ -3746,6 +3792,7 @@ static struct kunit_case amdgpu_dm_plane_test_cases[] = { /* amdgpu_dm_plane_fill_plane_buffer_attributes() */ KUNIT_CASE(dm_test_fill_plane_buffer_attributes_video), KUNIT_CASE(dm_test_fill_plane_buffer_attributes_gfx12), + KUNIT_CASE(dm_test_fill_plane_buffer_attributes_gfx6), /* amdgpu_dm_plane_get_cursor_position() */ KUNIT_CASE(dm_test_get_cursor_position), KUNIT_CASE(dm_test_get_cursor_position_bad_size), -- 2.43.0