All of lore.kernel.org
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "Himal Prasad Ghimiray" <himal.prasad.ghimiray@intel.com>
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [RFC v2 01/21] drm/xe: Add xe_usm_queue generic USM circular buffer
Date: Wed, 09 Sep 2026 12:51:37 +0000	[thread overview]
Message-ID: <20260909125137.9407C1F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260909124457.1610890-24-himal.prasad.ghimiray@intel.com>

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [Medium] CIRC_SPACE macro misuse and missing power-of-two enforcement for queue size.
- [Low] Expensive integer division used in IRQ hot path instead of bitwise AND.
- [Low] Unused header inclusion for <linux/workqueue.h>.
--

commit 9fcff35c519c0e3d9b6f11658ca9f7a63e42fc15
Author: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>

drm/xe: Add xe_usm_queue generic USM circular buffer

This commit introduces struct xe_usm_queue, a generic lock-protected
circular FIFO used by USM consumers to receive fixed-size entries from IRQ
context. It provides inline helpers to push and pop entries, and to check if
the queue is full.

> diff --git a/drivers/gpu/drm/xe/xe_usm_queue.h b/drivers/gpu/drm/xe/xe_usm_queue.h
> new file mode 100644
> index 0000000000000..64f708a5f835a
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_usm_queue.h
> @@ -0,0 +1,127 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#ifndef _XE_USM_QUEUE_H_
> +#define _XE_USM_QUEUE_H_
> +
> +#include <linux/circ_buf.h>
> +#include <linux/spinlock.h>
> +#include <linux/workqueue.h>

[Severity: Low]
Since the embedded work_struct worker was removed from the queue in v2 of
this patch, is this header inclusion now unused?

> +
> +/**
> + * struct xe_usm_queue - Generic USM circular FIFO queue
> + *
> + * A lock-protected circular buffer used by the access counter
> + * consumer. Producers push fixed-size entries from IRQ context;
> + * workers process them asynchronously.
> + */
> +struct xe_usm_queue {
> +	/**
> +	 * @data: Raw byte buffer backing the queue, protected by @lock
> +	 */
> +	void *data;
> +	/** @size: Total size of @data in bytes */
> +	u32 size;

[Severity: Medium]
Does the size field need to enforce or document that it must be a power of
two?

If the queue is initialized with a non-power-of-two size, the CIRC_SPACE
macro used in xe_usm_queue_full() will compute incorrect free space values,
potentially leading to buffer overflows or premature 'queue full' rejections.

> +	/** @head: Write cursor in bytes, moved by producer, protected by @lock */
> +	u32 head;
> +	/** @tail: Read cursor in bytes, moved by consumer, protected by @lock */
> +	u32 tail;

[ ... ]

> +static inline bool xe_usm_queue_pop(struct xe_usm_queue *q, void *out)
> +{
> +	bool found = false;
> +
> +	spin_lock_irq(&q->lock);
> +	if (q->tail != q->head) {
> +		memcpy(out, q->data + q->tail, q->data_size);
> +		q->tail = (q->tail + q->entry_size) % q->size;

[Severity: Low]
Could this expensive integer division be replaced with a bitwise AND?

Since q->size must be a power of two for CIRC_SPACE() to function correctly,
optimizing this modulo operation to & (q->size - 1) would remove an integer
division operation.

> +		found = true;
> +	}
> +	spin_unlock_irq(&q->lock);
> +
> +	return found;
> +}
> +
> +/**
> + * xe_usm_queue_peek - Check whether the queue has at least one entry

[ ... ]

> +static inline void xe_usm_queue_push(struct xe_usm_queue *q, const void *in)
> +{
> +	lockdep_assert_held(&q->lock);
> +
> +	memcpy(q->data + q->head, in, q->data_size);
> +	q->head = (q->head + q->entry_size) % q->size;

[Severity: Low]
Similarly, could this integer division be optimized to a bitwise AND to avoid
a performance penalty in the hardware interrupt hot path?

> +}
> +#endif

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260909124457.1610890-23-himal.prasad.ghimiray@intel.com?part=1

  reply	other threads:[~2026-09-09 12:51 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-09 12:44 [RFC v2 00/21] drm/xe: Access counter support for migration hints Himal Prasad Ghimiray
2026-09-09 12:44 ` [RFC v2 01/21] drm/xe: Add xe_usm_queue generic USM circular buffer Himal Prasad Ghimiray
2026-09-09 12:51   ` sashiko-bot [this message]
2026-09-09 12:44 ` [RFC v2 02/21] drm/xe: Stub out new access_counter layer Himal Prasad Ghimiray
2026-09-09 12:44 ` [RFC v2 03/21] drm/xe: Implement xe_access_counter_init Himal Prasad Ghimiray
2026-09-09 12:55   ` sashiko-bot
2026-09-09 12:44 ` [RFC v2 04/21] drm/xe: Implement xe_access_counter_handler Himal Prasad Ghimiray
2026-09-09 12:58   ` sashiko-bot
2026-09-09 12:44 ` [RFC v2 05/21] drm/xe: Extract xe_vma_lock_and_validate helper Himal Prasad Ghimiray
2026-09-09 12:45 ` [RFC v2 06/21] drm/xe: Move ASID to FAULT VM lookup to xe_device Himal Prasad Ghimiray
2026-09-09 12:45 ` [RFC v2 07/21] drm/xe/pf: Use xe_device_asid_to_vm in xe_pagefault_save_to_vm Himal Prasad Ghimiray
2026-09-09 12:45 ` [RFC v2 08/21] drm/xe: Implement xe_access_counter_queue_work Himal Prasad Ghimiray
2026-09-09 12:45 ` [RFC v2 09/21] drm/xe: Implement xe_access_counter_service Himal Prasad Ghimiray
2026-09-09 12:45 ` [RFC v2 10/21] drm/xe/trace: Add xe_vma_acc trace event for access counter notifications Himal Prasad Ghimiray
2026-09-09 12:45 ` [RFC v2 11/21] drm/xe/svm: Handle svm vma for acc_ctr trigger Himal Prasad Ghimiray
2026-09-09 12:52   ` sashiko-bot
2026-09-09 12:45 ` [RFC v2 12/21] drm/xe: Service all VMAs in an access counter granularity window Himal Prasad Ghimiray
2026-09-09 12:45 ` [RFC v2 13/21] drm/xe: Add xe_guc_access_counter layer Himal Prasad Ghimiray
2026-09-09 12:54   ` sashiko-bot
2026-09-09 12:45 ` [RFC v2 14/21] drm/xe/uapi: Add access counter parameter extension for exec queue Himal Prasad Ghimiray
2026-09-09 12:52   ` sashiko-bot
2026-09-09 12:45 ` [RFC v2 15/21] drm/xe/lrc: Pass exec_queue to xe_lrc_create for access counter params Himal Prasad Ghimiray
2026-09-09 12:45 ` [RFC v2 16/21] drm/xe/vm: Add xe_vma_supports_access_ctr() helper Himal Prasad Ghimiray
2026-09-09 12:45 ` [RFC v2 17/21] drm/xe/pt: Set NC PTE bit for VMAs ineligible for access counting Himal Prasad Ghimiray
2026-09-09 12:56   ` sashiko-bot
2026-09-09 12:45 ` [RFC v2 18/21] drm/xe/svm: Define access counter migration policy Himal Prasad Ghimiray
2026-09-09 13:01   ` sashiko-bot
2026-09-09 12:45 ` [RFC v2 19/21] drm/xe/svm: Add MIGRATE_ON_ACCESS_COUNTER bind flag Himal Prasad Ghimiray
2026-09-09 12:57   ` sashiko-bot
2026-09-09 12:45 ` [RFC v2 20/21] drm/xe/svm: Move EVICTED PAGES debug log to callers Himal Prasad Ghimiray
2026-09-09 12:45 ` [RFC v2 21/21] drm/xe/svm: Distinguish access-counter-triggered range setup in logs Himal Prasad Ghimiray
2026-09-09 12:58   ` sashiko-bot

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260909125137.9407C1F00A3A@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=himal.prasad.ghimiray@intel.com \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=sashiko-reviews@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.