From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
Subject: [PATCH v2 10/13] drm/i915: Introduce enum intel_commit_type
Date: Wed, 9 Sep 2026 19:17:27 +0300 [thread overview]
Message-ID: <20260909161730.12969-11-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20260909161730.12969-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Currently we use two booleans (use_dsb and use_flipq)
to track how we are going to perform the actual commit.
That is rarher awkward, and potentially fragile as the
'use_dsb && use_flipq' combination isn't even legal.
Switch over to an enum instead.
v2: Rebase due to intel_crtc_needs_vblank_work() keeping
the use_dsb check
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_atomic.c | 3 +-
drivers/gpu/drm/i915/display/intel_color.c | 6 +-
drivers/gpu/drm/i915/display/intel_crtc.c | 7 +-
drivers/gpu/drm/i915/display/intel_display.c | 101 ++++++++++--------
.../drm/i915/display/intel_display_types.h | 8 +-
5 files changed, 72 insertions(+), 53 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c
index b66c2d4ba2b3..b042c3cc78e1 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -275,8 +275,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
crtc_state->update_planes = 0;
crtc_state->dsb_color = NULL;
crtc_state->dsb_commit = NULL;
- crtc_state->use_dsb = false;
- crtc_state->use_flipq = false;
+ crtc_state->commit_type = INTEL_COMMIT_MMIO;
return &crtc_state->uapi;
}
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 26e92221fa19..aa2f2b22312a 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -2029,14 +2029,14 @@ void intel_color_prepare_commit(struct intel_atomic_state *state,
crtc_state->dsb_color = intel_dsb_prepare(state, crtc, INTEL_DSB_1, 1024);
if (!intel_color_uses_dsb(crtc_state)) {
- crtc_state->use_flipq = false;
- crtc_state->use_dsb = false;
+ crtc_state->commit_type = INTEL_COMMIT_MMIO;
return;
}
display->color.funcs->load_luts(crtc_state);
- if (crtc_state->use_dsb && intel_color_uses_chained_dsb(crtc_state)) {
+ if (crtc_state->commit_type == INTEL_COMMIT_DSB &&
+ intel_color_uses_chained_dsb(crtc_state)) {
intel_vrr_send_push(crtc_state->dsb_color, crtc_state);
intel_dsb_wait_for_delayed_vblank(state, crtc_state->dsb_color);
intel_vrr_check_push_sent(crtc_state->dsb_color, crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 0de24d221e48..829ff2a2c025 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -499,8 +499,7 @@ static bool intel_crtc_needs_vblank_work(const struct intel_crtc_state *crtc_sta
!crtc_state->preload_luts &&
!intel_crtc_needs_modeset(crtc_state) &&
!intel_color_uses_dsb(crtc_state) &&
- !crtc_state->use_flipq &&
- !crtc_state->use_dsb;
+ crtc_state->commit_type == INTEL_COMMIT_MMIO;
}
static void intel_crtc_vblank_work(struct kthread_work *base)
@@ -598,7 +597,7 @@ void intel_pipe_update_start(struct intel_atomic_state *state,
struct intel_vblank_evade_ctx evade;
int scanline;
- drm_WARN_ON(display->drm, new_crtc_state->use_dsb || new_crtc_state->use_flipq);
+ drm_WARN_ON(display->drm, new_crtc_state->commit_type != INTEL_COMMIT_MMIO);
intel_psr_lock(new_crtc_state);
@@ -737,7 +736,7 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
u32 end_vbl_count = intel_crtc_get_vblank_counter(crtc);
ktime_t end_vbl_time = ktime_get();
- drm_WARN_ON(display->drm, new_crtc_state->use_dsb || new_crtc_state->use_flipq);
+ drm_WARN_ON(display->drm, new_crtc_state->commit_type != INTEL_COMMIT_MMIO);
if (new_crtc_state->do_async_flip)
goto out;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d7bd1b862aa9..9a24eb16025a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6798,7 +6798,7 @@ static void commit_pipe_pre_planes(struct intel_atomic_state *state,
intel_atomic_get_new_crtc_state(state, crtc);
bool modeset = intel_crtc_needs_modeset(new_crtc_state);
- drm_WARN_ON(display->drm, new_crtc_state->use_dsb || new_crtc_state->use_flipq);
+ drm_WARN_ON(display->drm, new_crtc_state->commit_type != INTEL_COMMIT_MMIO);
/*
* During modesets pipe configuration was programmed as the
@@ -6828,7 +6828,7 @@ static void commit_pipe_post_planes(struct intel_atomic_state *state,
intel_atomic_get_new_crtc_state(state, crtc);
bool modeset = intel_crtc_needs_modeset(new_crtc_state);
- drm_WARN_ON(display->drm, new_crtc_state->use_dsb || new_crtc_state->use_flipq);
+ drm_WARN_ON(display->drm, new_crtc_state->commit_type != INTEL_COMMIT_MMIO);
/*
* Disable the scaler(s) after the plane(s) so that we don't
@@ -6917,13 +6917,13 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state,
drm_WARN_ON(display->drm, !intel_display_power_is_enabled(display, POWER_DOMAIN_DC_OFF));
- if (!modeset &&
- intel_crtc_needs_color_update(new_crtc_state) &&
- !new_crtc_state->use_dsb && !new_crtc_state->use_flipq)
- intel_color_commit_noarm(NULL, new_crtc_state);
+ if (new_crtc_state->commit_type == INTEL_COMMIT_MMIO) {
+ if (!modeset &&
+ intel_crtc_needs_color_update(new_crtc_state))
+ intel_color_commit_noarm(NULL, new_crtc_state);
- if (!new_crtc_state->use_dsb && !new_crtc_state->use_flipq)
intel_crtc_planes_update_noarm(NULL, state, crtc);
+ }
}
static void intel_update_crtc(struct intel_atomic_state *state,
@@ -6934,18 +6934,23 @@ static void intel_update_crtc(struct intel_atomic_state *state,
struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
- if (new_crtc_state->use_flipq) {
+ switch (new_crtc_state->commit_type) {
+ case INTEL_COMMIT_FLIPQ:
intel_flipq_enable(new_crtc_state);
intel_crtc_prepare_vblank_event(new_crtc_state, &crtc->flipq_event);
intel_flipq_add(crtc, INTEL_FLIPQ_PLANE_1, 0, INTEL_DSB_0,
new_crtc_state->dsb_commit);
- } else if (new_crtc_state->use_dsb) {
+ break;
+
+ case INTEL_COMMIT_DSB:
intel_crtc_prepare_vblank_event(new_crtc_state, &crtc->dsb_event);
intel_dsb_commit(new_crtc_state->dsb_commit);
- } else {
+ break;
+
+ case INTEL_COMMIT_MMIO:
/* Perform vblank evasion around commit operation */
intel_pipe_update_start(state, crtc);
@@ -6959,6 +6964,7 @@ static void intel_update_crtc(struct intel_atomic_state *state,
commit_pipe_post_planes(state, crtc);
intel_pipe_update_end(state, crtc);
+ break;
}
/*
@@ -7368,36 +7374,47 @@ static void intel_atomic_prepare_plane_clear_colors(struct intel_atomic_state *s
}
}
-static void intel_atomic_dsb_prepare(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
+static enum intel_commit_type
+intel_atomic_commit_type(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(state);
struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
if (!new_crtc_state->hw.active)
- return;
+ return INTEL_COMMIT_MMIO;
if (state->base.legacy_cursor_update)
- return;
+ return INTEL_COMMIT_MMIO;
/* FIXME deal with everything */
- new_crtc_state->use_flipq =
- intel_flipq_supported(display) &&
- !new_crtc_state->do_async_flip &&
- !new_crtc_state->vrr.enable &&
- !new_crtc_state->has_psr &&
- !intel_crtc_needs_modeset(new_crtc_state) &&
- !intel_crtc_needs_fastset(new_crtc_state) &&
- !intel_crtc_needs_color_update(new_crtc_state);
-
- new_crtc_state->use_dsb =
- intel_dsb_supported(display) &&
- !new_crtc_state->use_flipq &&
- !new_crtc_state->do_async_flip &&
- (DISPLAY_VER(display) >= 20 || !new_crtc_state->has_psr) &&
- !intel_crtc_needs_modeset(new_crtc_state) &&
- !intel_crtc_needs_fastset(new_crtc_state);
+ if (intel_flipq_supported(display) &&
+ !new_crtc_state->do_async_flip &&
+ !new_crtc_state->vrr.enable &&
+ !new_crtc_state->has_psr &&
+ !intel_crtc_needs_modeset(new_crtc_state) &&
+ !intel_crtc_needs_fastset(new_crtc_state) &&
+ !intel_crtc_needs_color_update(new_crtc_state))
+ return INTEL_COMMIT_FLIPQ;
+
+ if (intel_dsb_supported(display) &&
+ !new_crtc_state->do_async_flip &&
+ (DISPLAY_VER(display) >= 20 || !new_crtc_state->has_psr) &&
+ !intel_crtc_needs_modeset(new_crtc_state) &&
+ !intel_crtc_needs_fastset(new_crtc_state))
+ return INTEL_COMMIT_DSB;
+
+ return INTEL_COMMIT_MMIO;
+}
+
+static void intel_atomic_dsb_prepare(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
+{
+ struct intel_crtc_state *new_crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
+
+ new_crtc_state->commit_type = intel_atomic_commit_type(state, crtc);
intel_color_prepare_commit(state, crtc);
}
@@ -7406,7 +7423,7 @@ static unsigned int
commit_dsb_max_cmds(const struct intel_crtc_state *crtc_state)
{
/* just enough to start the chained DSB */
- if (!crtc_state->use_dsb && !crtc_state->use_flipq)
+ if (crtc_state->commit_type == INTEL_COMMIT_MMIO)
return 16;
/*
@@ -7429,23 +7446,21 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
- if (!new_crtc_state->use_flipq &&
- !new_crtc_state->use_dsb &&
+ if (new_crtc_state->commit_type == INTEL_COMMIT_MMIO &&
!new_crtc_state->dsb_color)
return;
new_crtc_state->dsb_commit = intel_dsb_prepare(state, crtc, INTEL_DSB_0,
commit_dsb_max_cmds(new_crtc_state));
if (!new_crtc_state->dsb_commit) {
- new_crtc_state->use_flipq = false;
- new_crtc_state->use_dsb = false;
+ new_crtc_state->commit_type = INTEL_COMMIT_MMIO;
intel_color_cleanup_commit(new_crtc_state);
return;
}
- if (new_crtc_state->use_flipq || new_crtc_state->use_dsb) {
+ if (new_crtc_state->commit_type != INTEL_COMMIT_MMIO) {
/* Wa_18034343758 */
- if (new_crtc_state->use_flipq)
+ if (new_crtc_state->commit_type == INTEL_COMMIT_FLIPQ)
intel_flipq_wait_dmc_halt(new_crtc_state->dsb_commit, crtc);
if (new_crtc_state->vrr.dc_balance.enable) {
@@ -7477,7 +7492,7 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
intel_psr_trigger_frame_change_event(new_crtc_state->dsb_commit,
state, crtc);
- if (new_crtc_state->use_dsb)
+ if (new_crtc_state->commit_type == INTEL_COMMIT_DSB)
intel_dsb_vblank_evade(state, new_crtc_state->dsb_commit);
if (intel_crtc_needs_color_update(new_crtc_state))
@@ -7495,7 +7510,7 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
new_crtc_state);
/* Wa_18034343758 */
- if (new_crtc_state->use_flipq)
+ if (new_crtc_state->commit_type == INTEL_COMMIT_FLIPQ)
intel_flipq_unhalt_dmc(new_crtc_state->dsb_commit, crtc);
}
@@ -7506,7 +7521,8 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
intel_dsb_gosub(new_crtc_state->dsb_commit,
new_crtc_state->dsb_color);
- if (new_crtc_state->use_dsb && !intel_color_uses_chained_dsb(new_crtc_state)) {
+ if (new_crtc_state->commit_type == INTEL_COMMIT_DSB &&
+ !intel_color_uses_chained_dsb(new_crtc_state)) {
/*
* Dsb wait vblank may or may not skip. Let's remove it for PSR
* trans push case to ensure we are not waiting two vblanks
@@ -7695,10 +7711,11 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
intel_atomic_dsb_wait_commit(new_crtc_state);
- if (!state->base.legacy_cursor_update && !new_crtc_state->use_dsb)
+ if (!state->base.legacy_cursor_update &&
+ new_crtc_state->commit_type == INTEL_COMMIT_MMIO)
intel_vrr_check_push_sent(NULL, new_crtc_state);
- if (new_crtc_state->use_flipq)
+ if (new_crtc_state->commit_type == INTEL_COMMIT_FLIPQ)
intel_flipq_disable(new_crtc_state);
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 9016be52c7ea..11d68c951a3a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1389,8 +1389,12 @@ struct intel_crtc_state {
/* For DSB based pipe updates */
struct intel_dsb *dsb_color, *dsb_commit;
- bool use_dsb;
- bool use_flipq;
+
+ enum intel_commit_type {
+ INTEL_COMMIT_MMIO,
+ INTEL_COMMIT_DSB,
+ INTEL_COMMIT_FLIPQ,
+ } commit_type;
u32 psr2_man_track_ctl;
--
2.54.0
next prev parent reply other threads:[~2026-09-09 16:18 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-09 16:17 [PATCH v2 00/13] drm/i915: Some DSB/flipq stuff Ville Syrjala
2026-09-09 16:17 ` [PATCH v2 01/13] drm/i915: Give up on DSB/flip queue if we fail to allocate the color DSB buffer Ville Syrjala
2026-09-09 16:17 ` [PATCH v2 02/13] drm/i915: Check use_flipq in intel_crtc_needs_vblank_work() Ville Syrjala
2026-09-09 16:17 ` [PATCH v2 03/13] drm/i915: Don't initialize flip queue on pre-LNL Ville Syrjala
2026-09-09 16:17 ` [PATCH v2 04/13] drm/i915: Warn about use_flip==true in MMIO commit codepaths Ville Syrjala
2026-09-09 16:17 ` [PATCH v2 05/13] drm/i915: Refine vblank evasion DSB check Ville Syrjala
2026-09-09 16:17 ` [PATCH v2 06/13] drm/i915: Make intel_crtc_needs_vblank_work() easier on the eye Ville Syrjala
2026-09-09 16:17 ` [PATCH v2 07/13] drm/i915: Extract intel_dsb_supported() Ville Syrjala
2026-09-09 16:17 ` [PATCH v2 08/13] drm/i915: Use intel_dsb_supported() to determine 'use_dsb' Ville Syrjala
2026-09-09 16:17 ` [PATCH v2 09/13] drm/i915: Extract commit_dsb_max_cmds() Ville Syrjala
2026-09-09 16:17 ` Ville Syrjala [this message]
2026-09-09 16:17 ` [PATCH v2 11/13] drm/i915: Carve intel_atomic_commit_type() up a bit Ville Syrjala
2026-09-09 16:17 ` [PATCH v2 12/13] drm/i915/dsb: Add tracepoints for DSB commit Ville Syrjala
2026-09-09 16:34 ` sashiko-bot
2026-09-10 11:23 ` Ville Syrjälä
2026-09-09 16:17 ` [PATCH v2 13/13] drm/i915/dsb: Add tracepoints for flip queue Ville Syrjala
2026-09-09 16:25 ` ✗ CI.checkpatch: warning for drm/i915: Some DSB/flipq stuff (rev2) Patchwork
2026-09-09 16:27 ` ✓ CI.KUnit: success " Patchwork
2026-09-09 17:11 ` ✓ Xe.CI.BAT: " Patchwork
2026-09-09 17:50 ` ✓ i915.CI.BAT: " Patchwork
2026-09-10 0:25 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-09-10 10:56 ` ✗ i915.CI.Full: " Patchwork
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