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From: Jonathan Cameron <jic23@kernel.org>
To: Davidlohr Bueso <dave@stgolabs.net>
Cc: dave.jiang@intel.com, alison.schofield@intel.com,
	icheng@nvidia.com, ming.li@zohomail.com,
	benjamin.cheatham@amd.com, alucerop@amd.com,
	linux-cxl@vger.kernel.org
Subject: Re: [PATCH v8 07/10] cxl/pci: Split BI capability probe from setup
Date: Wed, 9 Sep 2026 22:40:37 +0100	[thread overview]
Message-ID: <20260909224037.7bd984d5@jic23-hlaptop> (raw)
In-Reply-To: <20260909170302.1550680-8-dave@stgolabs.net>

On Wed,  9 Sep 2026 10:02:59 -0700
Davidlohr Bueso <dave@stgolabs.net> wrote:

> Decouple the topology read-only capability verification phase from
> cxl_bi_setup() into cxl_bi_probe_capable(), recording the result in
> cxlds->bi_capable.
> 
> This allows further dealing with auto-committed BI hdm decoders;
> having such knowledge upon decoder enumeration time.
> 
> No functional change intended.
> 
> Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> Signed-off-by: Davidlohr Bueso <dave@stgolabs.net>
One question about whether you can reduce the diff by shuffling things
a little.  Either way
Reviewed-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>

> ---
>  drivers/cxl/core/pci.c | 87 +++++++++++++++++++++++++-----------------
>  drivers/cxl/cxl.h      |  1 +
>  drivers/cxl/port.c     |  1 +
>  include/cxl/cxl.h      |  2 +
>  4 files changed, 56 insertions(+), 35 deletions(-)
> 
> diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
> index 8c3c00137849..95064be6faad 100644
> --- a/drivers/cxl/core/pci.c
> +++ b/drivers/cxl/core/pci.c
> @@ -1297,59 +1297,37 @@ static int cxl_bi_enable_path(struct cxl_dev_state *cxlds,

> +/*
> + * An SBR wipes the device's BI Enable; an FLR leaves it alone.
> + * The check is against the hardware, not decoder state: BI is
> + * enabled at probe, so it can be wiped with no decoder ever
> + * committed. A wipe invalidates the software state; BI is never
> + * re-enabled here.
> + */
> +void cxl_bi_reset_detected(struct cxl_port *endpoint)
> +{
> +	struct cxl_memdev *cxlmd = to_cxl_memdev(endpoint->uport_dev);
> +	struct cxl_dev_state *cxlds = cxlmd->cxlds;
> +	void __iomem *bi = endpoint->regs.bi_decoder;
> +
> +	if (!cxlds->bi)
> +		return;
> +
> +	if (FIELD_GET(CXL_BI_DECODER_CTRL_BI_ENABLE,
> +		      readl(bi + CXL_BI_DECODER_CTRL_OFFSET)))
> +		return;
> +
> +	dev_dbg(cxlds->dev, "BI disabled by reset\n");
> +	cxlds->bi = false;
> +}
> +EXPORT_SYMBOL_NS_GPL(cxl_bi_reset_detected, "CXL");

Why did this need to move?  Just to have a nicer code arrangement?
Maybe not worth it given it makes it look like this changed
and it didn't.  I'd leave it where diff thinks it was originally.



> +
> +int cxl_bi_setup(struct cxl_port *endpoint)
> +{
> +	struct cxl_memdev *cxlmd = to_cxl_memdev(endpoint->uport_dev);
> +	struct cxl_dport *dport = endpoint->parent_dport;
> +	struct cxl_dev_state *cxlds = cxlmd->cxlds;
> +	int rc;
> +
> +	if (!cxlds->bi_capable)
> +		return 0;
> +

  reply	other threads:[~2026-09-09 21:40 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-09 17:02 [PATCH v8 0/10] cxl: Support Back-Invalidate Davidlohr Bueso
2026-09-09 17:02 ` [PATCH v8 01/10] cxl: Add BI register probing and port initialization Davidlohr Bueso
2026-09-09 19:38   ` Jonathan Cameron
2026-09-09 17:02 ` [PATCH v8 02/10] cxl/pci: Add BI topology enable/disable Davidlohr Bueso
2026-09-09 21:21   ` Jonathan Cameron
2026-09-10  1:33     ` Davidlohr Bueso
2026-09-10  2:40   ` Li Ming
2026-09-09 17:02 ` [PATCH v8 03/10] cxl/hdm: Add BI coherency support for endpoint decoders Davidlohr Bueso
2026-09-09 21:27   ` Jonathan Cameron
2026-09-09 17:02 ` [PATCH v8 04/10] cxl: Add HDM-DB region creation Davidlohr Bueso
2026-09-09 17:48   ` sashiko-bot
2026-09-09 21:31   ` Jonathan Cameron
2026-09-09 17:02 ` [PATCH v8 05/10] cxl/hdm: Rename decoder coherency flags Davidlohr Bueso
2026-09-09 21:32   ` Jonathan Cameron
2026-09-09 17:02 ` [PATCH v8 06/10] cxl/region: Log the coherency model at region creation Davidlohr Bueso
2026-09-09 21:32   ` Jonathan Cameron
2026-09-09 17:02 ` [PATCH v8 07/10] cxl/pci: Split BI capability probe from setup Davidlohr Bueso
2026-09-09 21:40   ` Jonathan Cameron [this message]
2026-09-09 21:45     ` Davidlohr Bueso
2026-09-09 17:03 ` [PATCH v8 08/10] cxl: Allow auto-committed BI hdm decoders Davidlohr Bueso
2026-09-09 21:45   ` Jonathan Cameron
2026-09-10 11:38   ` Li Ming
2026-09-09 17:03 ` [PATCH v8 09/10] cxl/test: Add mock BI topology support Davidlohr Bueso
2026-09-09 21:49   ` Jonathan Cameron
2026-09-09 22:08     ` Davidlohr Bueso
2026-09-09 17:03 ` [PATCH v8 10/10] cxl/doc: Update maturity map with BI support Davidlohr Bueso
2026-09-09 21:50   ` Jonathan Cameron
2026-09-09 18:47 ` [PATCH v8 0/10] cxl: Support Back-Invalidate Davidlohr Bueso

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