[PATCH v2 1/1] linux-user/hexagon: Add HWCAP support

[Brian Cain <brian.cain@oss.qualcomm.com>]

Link: https://lore.kernel.org/linux-hexagon/20260910003346.596593-1-brian.cain@oss.qualcomm.com/
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
---
 linux-user/hexagon/target_elf.h | 30 ++++++++++++++++
 linux-user/hexagon/elfload.c    | 61 +++++++++++++++++++++++++++++++++
 2 files changed, 91 insertions(+)

diff --git a/linux-user/hexagon/target_elf.h b/linux-user/hexagon/target_elf.h
index f81ae3895a6..90e5032d5aa 100644
--- a/linux-user/hexagon/target_elf.h
+++ b/linux-user/hexagon/target_elf.h
@@ -21,4 +21,34 @@
 #define ELF_CLASS               ELFCLASS32
 #define ELF_MACHINE             EM_HEXAGON
 
+#define HAVE_ELF_HWCAP          1
+
+enum {
+    HWCAP_HEXAGON_ISA_MASK          = 0x7F,
+    HWCAP_HEXAGON_ISA_V2            = 1,
+    HWCAP_HEXAGON_ISA_V3            = 2,
+    HWCAP_HEXAGON_ISA_V4            = 3,
+    HWCAP_HEXAGON_ISA_V5            = 4,
+    HWCAP_HEXAGON_ISA_V55           = 5,
+    HWCAP_HEXAGON_ISA_V60           = 6,
+    HWCAP_HEXAGON_ISA_V62           = 7,
+    HWCAP_HEXAGON_ISA_V65           = 8,
+    HWCAP_HEXAGON_ISA_V66           = 9,
+    HWCAP_HEXAGON_ISA_V67           = 10,
+    HWCAP_HEXAGON_ISA_V68           = 11,
+    HWCAP_HEXAGON_ISA_V69           = 12,
+    HWCAP_HEXAGON_ISA_V71           = 13,
+    HWCAP_HEXAGON_ISA_V73           = 14,
+    HWCAP_HEXAGON_ISA_V75           = 15,
+    HWCAP_HEXAGON_ISA_V77           = 16,
+    HWCAP_HEXAGON_ISA_V79           = 17,
+    HWCAP_HEXAGON_ISA_V81           = 18,
+    HWCAP_HEXAGON_HVX               = 1 << 7,
+    HWCAP_HEXAGON_CABAC             = 1 << 8,
+    HWCAP_HEXAGON_HVX_LENGTH_128B   = 1 << 9,
+    HWCAP_HEXAGON_HVX_IEEE_FP       = 1 << 10,
+    HWCAP_HEXAGON_AUDIO             = 1 << 11,
+    HWCAP_HEXAGON_HMX               = 1 << 12,
+};
+
 #endif
diff --git a/linux-user/hexagon/elfload.c b/linux-user/hexagon/elfload.c
index 39b02018145..3d19a711f85 100644
--- a/linux-user/hexagon/elfload.c
+++ b/linux-user/hexagon/elfload.c
@@ -3,8 +3,69 @@
 #include "qemu/osdep.h"
 #include "qemu.h"
 #include "loader.h"
+#include "target_elf.h"
+#include "target/hexagon/cpu.h"
 
 
+abi_ulong get_elf_hwcap(CPUState *cs)
+{
+    HexagonCPUClass *mcc = HEXAGON_CPU_GET_CLASS(cs);
+    abi_ulong hwcaps;
+    uint32_t hex_ver;
+
+    if (!mcc->hex_def) {
+        return 0;
+    }
+
+    hex_ver = mcc->hex_def->hex_version;
+    switch (hex_ver) {
+    case HEX_VER_V5:
+        hwcaps = HWCAP_HEXAGON_ISA_V5;
+        break;
+    case HEX_VER_V55:
+        hwcaps = HWCAP_HEXAGON_ISA_V55;
+        break;
+    case HEX_VER_V60:
+    case HEX_VER_V61:
+        hwcaps = HWCAP_HEXAGON_ISA_V60;
+        break;
+    case HEX_VER_V62:
+        hwcaps = HWCAP_HEXAGON_ISA_V62;
+        break;
+    case HEX_VER_V65:
+        hwcaps = HWCAP_HEXAGON_ISA_V65;
+        break;
+    case HEX_VER_V66:
+        hwcaps = HWCAP_HEXAGON_ISA_V66;
+        break;
+    case HEX_VER_V67:
+        hwcaps = HWCAP_HEXAGON_ISA_V67;
+        break;
+    case HEX_VER_V68:
+        hwcaps = HWCAP_HEXAGON_ISA_V68;
+        break;
+    case HEX_VER_V69:
+        hwcaps = HWCAP_HEXAGON_ISA_V69;
+        break;
+    case HEX_VER_V71:
+        hwcaps = HWCAP_HEXAGON_ISA_V71;
+        break;
+    case HEX_VER_V73:
+        hwcaps = HWCAP_HEXAGON_ISA_V73;
+        break;
+    default:
+        return 0;
+    }
+
+    hwcaps |= HWCAP_HEXAGON_HVX;
+    hwcaps |= HWCAP_HEXAGON_HVX_LENGTH_128B;
+    if (hex_ver >= HEX_VER_V68) {
+        hwcaps |= HWCAP_HEXAGON_HVX_IEEE_FP;
+    }
+
+    return hwcaps;
+}
+
 const char *get_elf_cpu_model(uint32_t eflags)
 {
     static char buf[32];
-- 
2.34.1