Re: [PATCH v5 09/10] drm/i915/irq: conditional HPD IRQ resets based on PME capability

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Unmasked GMBUS and AUX interrupts during suspend risk spurious wakeups
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commit ecc8bb9fede209da1bb1f570c685a52b7cee1c75
Author: Vinod Govindapillai <vinod.govindapillai@intel.com>

drm/i915/irq: conditional HPD IRQ resets based on PME capability

This commit skips resetting HPD IRQs during suspend if the device supports
generating PMEs from HPDs. This prevents the loss of HPD events by tying
the reset logic conditionally to the device's PME capability.

> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c

[ ... ]

> @@ -2250,13 +2253,15 @@ static void gen11_display_irq_reset(struct intel_display *display)
>  	irq_reset(display, GEN8_DE_PORT_IRQ_REGS);
>  	irq_reset(display, GEN8_DE_MISC_IRQ_REGS);
>  
> -	if (DISPLAY_VER(display) >= 14)
> -		irq_reset(display, PICAINTERRUPT_IRQ_REGS);
> -	else
> -		irq_reset(display, GEN11_DE_HPD_IRQ_REGS);
> +	if (reset_hpd) {
> +		if (DISPLAY_VER(display) >= 14)
> +			irq_reset(display, PICAINTERRUPT_IRQ_REGS);
> +		else
> +			irq_reset(display, GEN11_DE_HPD_IRQ_REGS);
>  
> -	if (INTEL_PCH_TYPE(display) >= PCH_ICP)
> -		irq_reset(display, SDE_IRQ_REGS);
> +		if (INTEL_PCH_TYPE(display) >= PCH_ICP)
> +			irq_reset(display, SDE_IRQ_REGS);
> +	}
>  }

[Severity: Medium]
Does skipping the entire register reset here leave non-HPD interrupts
unmasked during suspend?

When a display device is capable of generating PME from HPD, reset_hpd
is set to false in gen11_display_irq_reset(). While this successfully
preserves HPD interrupts by skipping the reset of SDE_IRQ_REGS and
PICAINTERRUPT_IRQ_REGS, these registers also contain non-HPD interrupt
bits such as SDE_GMBUS_ICP and XELPDP_AUX_TC_MASK.

Because these bits are typically unmasked by default during postinstall
(e.g., in icp_irq_postinstall), skipping the full register reset leaves
these non-HPD interrupts active. If an I2C/GMBUS or DP AUX interrupt fires
due to noise or a delayed transaction during suspend, can this propagate
and cause spurious wakeups that prevent deep sleep states like S3 or S0ix?

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Sashiko AI review · https://sashiko.dev/#/patchset/20260911080448.778316-1-vinod.govindapillai@intel.com?part=9