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From: Yazen Ghannam <yazen.ghannam@amd.com>
To: OptoCloud <git@optocloud.no>
Cc: Tony Luck <tony.luck@intel.com>, Borislav Petkov <bp@alien8.de>,
	Thomas Gleixner <tglx@kernel.org>, Ingo Molnar <mingo@redhat.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	"H. Peter Anvin" <hpa@zytor.com>,
	"x86@kernel.org" <x86@kernel.org>,
	"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 3/3] x86/mce/amd: Reset deferred-register state between polling banks
Date: Fri, 11 Sep 2026 09:44:12 -0400	[thread overview]
Message-ID: <20260911134412.GB2018031@yaz-khff2.amd.com> (raw)
In-Reply-To: <VVPre8FwBOaDwOJsZLizBoEllya95qRDFGMnMwm_j_UOTE9L7LptaW7wFFQQNr9nBhwUYorxpQq_IZyQSsL3-IGNj6hdtcxr1HIg1xqWYPA=@optocloud.no>

On Thu, Sep 03, 2026 at 10:39:10PM +0000, OptoCloud wrote:
> Thanks for the review, here's v2.
> 
> machine_check_poll() reuses a single struct mce_hw_err while
> iterating over the MCA banks. smca_should_log_poll_error() sets
> MCE_CHECK_DFR_REGS in m->kflags when an error was taken from
> MCA_DESTAT rather than MCA_STATUS. Nothing clears the bit again for
> the rest of the poll, including on iterations that bail out early,
> so every later bank in the same pass inherits it.
> 
> A stale MCE_CHECK_DFR_REGS has two effects on a later bank:
> 
>   - mce_read_aux() reads MCx_DEADDR instead of MCA_ADDR, so the
>     address reported for that bank is wrong.
> 
>   - amd_clear_bank() returns before writing 0 to MCA_STATUS, so the
>     bank is logged again on the next poll.
> 
> Reset m->kflags at the start of each iteration, alongside the other
> bank-local resets, rather than clearing MCE_CHECK_DFR_REGS alone.
> The only other place kflags is set to zero is once, before the loop
> starts (mce_prep_record()'s initial memset), so there's no per-loop
> state a full reset would wipe out. It also covers any future kflags
> bit that ends up set within the loop the same way MCE_CHECK_DFR_REGS
> does today.
> 
> Found by code inspection; not reproduced on hardware.
> 
> Fixes: 7cb735d7c0cb ("x86/mce: Unify AMD DFR handler with MCA Polling")
> Signed-off-by: Eirik Bøe <git@optocloud.no>
> ---
> Changes since v1:
> - Dropped Cc: stable (Yazen)
> - Reset the whole m->kflags field instead of just MCE_CHECK_DFR_REGS
>   (Yazen)
> 
>  arch/x86/kernel/cpu/mce/core.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
> index 6fa15e19988e..16ac2418fd51 100644
> --- a/arch/x86/kernel/cpu/mce/core.c
> +++ b/arch/x86/kernel/cpu/mce/core.c
> @@ -823,6 +823,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
>  			continue;
> 
>  		mce_clear_hw_err_fields(&err);
> +		m->kflags = 0;
>  		m->bank = i;
> 

Why not include this in the helper function? In fact, this patch could
be merged with the other.

Thanks,
Yazen

      reply	other threads:[~2026-09-11 13:44 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-30  4:45 [PATCH 3/3] x86/mce/amd: Reset deferred-register state between polling banks OptoCloud
2026-09-03 20:36 ` Yazen Ghannam
2026-09-03 22:39   ` [PATCH v2 " OptoCloud
2026-09-11 13:44     ` Yazen Ghannam [this message]

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