From: Bradley Morgan <brads@mainlining.org>
To: "Paul E. McKenney" <paulmck@kernel.org>
Cc: frederic@kernel.org, neeraj.upadhyay@kernel.org,
boqun@kernel.org, joelagnelf@nvidia.com, rcu@vger.kernel.org,
"Andrew Morton" <akpm@linux-foundation.org>,
"Arnd Bergmann" <arnd@arndb.de>,
linux-arch@vger.kernel.org, "Vineet Gupta" <vgupta@kernel.org>,
linux-snps-arc@lists.infradead.org,
"Russell King" <linux@armlinux.org.uk>,
linux-arm-kernel@lists.infradead.org,
"Guo Ren" <guoren@kernel.org>,
linux-csky@vger.kernel.org,
"Yoshinori Sato" <ysato@users.sourceforge.jp>,
"Rich Felker" <dalias@libc.org>,
"John Paul Adrian Glaubitz" <glaubitz@physik.fu-berlin.de>,
linux-sh@vger.kernel.org, "Chris Zankel" <chris@zankel.net>,
"Max Filippov" <jcmvbkbc@gmail.com>,
linux-kernel@vger.kernel.org, brads@mainlining.org
Subject: [PATCH 4/6] csky: Emulate two-byte cmpxchg
Date: Fri, 11 Sep 2026 19:25:37 +0000 [thread overview]
Message-ID: <20260911192540.20983-5-brads@mainlining.org> (raw)
In-Reply-To: <20260911192540.20983-1-brads@mainlining.org>
csky has no byte or halfword atomic memory operations, so the
__cmpxchg_relaxed(), __cmpxchg_acquire() and __cmpxchg() switches
each route case 1 through cmpxchg_emu_u8() and leave case 2 to
fall into the BUILD_BUG() default. Route case 2 in all three
through the new cmpxchg_emu_u16().
arch_cmpxchg_local() maps to __cmpxchg_relaxed() and so picks up
case 2 automatically.
Signed-off-by: Bradley Morgan <brads@mainlining.org>
---
arch/csky/include/asm/cmpxchg.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/csky/include/asm/cmpxchg.h b/arch/csky/include/asm/cmpxchg.h
index db6dda47184e..a6a4805064a4 100644
--- a/arch/csky/include/asm/cmpxchg.h
+++ b/arch/csky/include/asm/cmpxchg.h
@@ -65,6 +65,9 @@
case 1: \
__ret = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, (uintptr_t)__old, (uintptr_t)__new); \
break; \
+ case 2: \
+ __ret = (__typeof__(*(ptr)))cmpxchg_emu_u16((volatile u16 *)__ptr, (uintptr_t)__old, (uintptr_t)__new); \
+ break; \
case 4: \
asm volatile ( \
"1: ldex.w %0, (%3) \n" \
@@ -98,6 +101,9 @@
case 1: \
__ret = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, (uintptr_t)__old, (uintptr_t)__new); \
break; \
+ case 2: \
+ __ret = (__typeof__(*(ptr)))cmpxchg_emu_u16((volatile u16 *)__ptr, (uintptr_t)__old, (uintptr_t)__new); \
+ break; \
case 4: \
asm volatile ( \
"1: ldex.w %0, (%3) \n" \
@@ -132,6 +138,9 @@
case 1: \
__ret = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)__ptr, (uintptr_t)__old, (uintptr_t)__new); \
break; \
+ case 2: \
+ __ret = (__typeof__(*(ptr)))cmpxchg_emu_u16((volatile u16 *)__ptr, (uintptr_t)__old, (uintptr_t)__new); \
+ break; \
case 4: \
asm volatile ( \
RELEASE_FENCE \
--
2.47.3
next prev parent reply other threads:[~2026-09-11 19:28 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-11 19:25 [PATCH 0/6] Add two-byte cmpxchg emulation and wire it into the architectures Bradley Morgan
2026-09-11 19:25 ` [PATCH 1/6] lib: Add two-byte cmpxchg emulation function Bradley Morgan
2026-09-11 22:10 ` David Laight
2026-09-11 22:10 ` David Laight
2026-09-11 22:13 ` Bradley Morgan
2026-09-11 23:09 ` Paul E. McKenney
2026-09-11 23:09 ` Paul E. McKenney
2026-09-12 9:30 ` David Laight
2026-09-12 9:30 ` David Laight
2026-09-12 10:29 ` Bradley Morgan
2026-09-12 18:58 ` Paul E. McKenney
2026-09-12 18:58 ` Paul E. McKenney
2026-09-12 21:11 ` Bradley Morgan
2026-09-11 19:25 ` [PATCH 2/6] ARC: Emulate two-byte cmpxchg Bradley Morgan
2026-09-11 19:25 ` [PATCH 3/6] ARM: Emulate two-byte cmpxchg on ARMv6 Bradley Morgan
2026-09-11 19:25 ` Bradley Morgan [this message]
2026-09-11 19:25 ` [PATCH 5/6] sh: Emulate two-byte cmpxchg Bradley Morgan
2026-09-11 19:25 ` [PATCH 6/6] xtensa: " Bradley Morgan
2026-09-11 20:17 ` [PATCH 0/6] Add two-byte cmpxchg emulation and wire it into the architectures Arnd Bergmann
2026-09-11 20:17 ` Arnd Bergmann
2026-09-11 20:20 ` Bradley Morgan
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