From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A4E1AC88E5D for ; Fri, 11 Sep 2026 20:12:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EF22D10F6ED; Fri, 11 Sep 2026 20:12:16 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="GPqa977D"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by gabe.freedesktop.org (Postfix) with ESMTPS id 91F4A10F30B for ; Fri, 11 Sep 2026 20:12:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1789157521; x=1820693521; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=yFc5pwFHvElzTLAMMbHvxa26C+uq8vM1k/lb9THxGBU=; b=GPqa977DAegNHqSbEMyTenvzgzbj1ci7vHaZhTtcuGlikMw/7d7XbxYK 5ZFudcltGTaDlJ/tJN55AoAfimzRlmi0zPebXS2YJ802xJSlwQcPQCmp6 YJw0sso+yqptyK+w9DdG7MOzeW2QzOCsnhr8rU6Vb9NerCKo8ygJ5tqts skYZOvH4yEs7mdsmXQeJ7/IV/oEy7/d+wJPoNHq93Szio+WX1HNFnuxQr QcuRl4XEegKs3Oi+eg0xioUeOH8uN7dAxTXdbKuDTrFT/6NqCQcqN7O9o 5igNpISBe5L4pF16ePwC3KhrjinUcdvyNnc2AvXo9LfnnclUJ69UeM19V Q==; X-CSE-ConnectionGUID: Fe/iDCOcQFaDpuCYVOTAwQ== X-CSE-MsgGUID: yzsz88etTYe/a1FMLN1O/g== X-IronPort-AV: E=McAfee;i="6800,10657,11902"; a="115162446" X-IronPort-AV: E=Sophos;i="6.27,97,1787036400"; d="scan'208";a="115162446" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Sep 2026 13:12:00 -0700 X-CSE-ConnectionGUID: qC6/xSchQyOAxKPvYhh2mg== X-CSE-MsgGUID: tB5Ym+VWQLSSAosp6UkI+Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.27,97,1787036400"; d="scan'208";a="277272124" Received: from mjruhl-vm.amr.corp.intel.com ([10.11.186.166]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Sep 2026 13:11:59 -0700 From: "Michael J. Ruhl" To: platform-driver-x86@vger.kernel.org, intel-xe@lists.freedesktop.org, hansg@kernel.org, ilpo.jarvinen@linux.intel.com, matthew.brost@intel.com, rodrigo.vivi@intel.com, thomas.hellstrom@linux.intel.com, airlied@gmail.com, simona@ffwll.ch, david.e.box@linux.intel.com, anoop.c.vijay@intel.com, badal.nilawar@intel.com, matthew.d.roper@intel.com, james.ausmus@intel.com, karthik.poosa@intel.com Subject: [PATCH v8 19/20] drm/xe/vsec: Update PMT internal access Date: Fri, 11 Sep 2026 13:12:07 -0700 Message-ID: <20260911201148.1610547-41-michael.j.ruhl@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260911201148.1610547-22-michael.j.ruhl@intel.com> References: <20260911201148.1610547-22-michael.j.ruhl@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Current PMT internal access assumes BMG devices. Use the new PMT GUID API to read the device specific guid. Minor cleanup for a newly unused parameter (mmio). Reviewed-by: Karthik Poosa Signed-off-by: Michael J. Ruhl --- drivers/gpu/drm/xe/xe_debugfs.c | 26 ++++++++++++++------------ drivers/gpu/drm/xe/xe_hwmon.c | 10 ++++++++-- drivers/gpu/drm/xe/xe_pcode.c | 10 ++++++++-- 3 files changed, 30 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c index 958fb717640a..c56f0e4a9b90 100644 --- a/drivers/gpu/drm/xe/xe_debugfs.c +++ b/drivers/gpu/drm/xe/xe_debugfs.c @@ -5,6 +5,7 @@ #include "xe_debugfs.h" +#include #include #include #include @@ -21,7 +22,6 @@ #include "xe_gt_printk.h" #include "xe_guc_ads.h" #include "xe_hw_engine.h" -#include "xe_mmio.h" #include "xe_pagefault.h" #include "xe_pcode.h" #include "xe_pm.h" @@ -146,15 +146,20 @@ static void xe_fault_inject_debugfs_register(struct xe_device *xe, } } -static void read_residency_counter(struct xe_device *xe, struct xe_mmio *mmio, - u32 offset, const char *name, struct drm_printer *p) +static void read_residency_counter(struct xe_device *xe, u32 offset, const char *name, + struct drm_printer *p) { u64 residency = 0; + u32 guid; int ret; - ret = xe_pmt_telem_read(xe->drm.dev, - xe_mmio_read32(mmio, BMG_PUNIT_TELEMETRY_GUID), - &residency, offset, sizeof(residency)); + ret = xe_vsec_get_guid(xe, &guid); + if (ret) { + drm_warn(&xe->drm, "PMT device is not available: %d\n", ret); + return; + } + + ret = xe_pmt_telem_read(xe->drm.dev, guid, &residency, offset, sizeof(residency)); if (ret != sizeof(residency)) { drm_warn(&xe->drm, "%s counter failed to read, ret %d\n", name, ret); return; @@ -293,13 +298,12 @@ static int pcode_info(struct seq_file *m, void *data) static int dgfx_pkg_residencies_show(struct seq_file *m, void *data) { struct xe_device *xe; - struct xe_mmio *mmio; struct drm_printer p; xe = node_to_xe(m->private); p = drm_seq_file_printer(m); guard(xe_pm_runtime)(xe); - mmio = xe_root_tile_mmio(xe); + static const struct { u32 offset; const char *name; @@ -313,7 +317,7 @@ static int dgfx_pkg_residencies_show(struct seq_file *m, void *data) }; for (int i = 0; i < ARRAY_SIZE(residencies); i++) - read_residency_counter(xe, mmio, residencies[i].offset, residencies[i].name, &p); + read_residency_counter(xe, residencies[i].offset, residencies[i].name, &p); return 0; } @@ -321,13 +325,11 @@ static int dgfx_pkg_residencies_show(struct seq_file *m, void *data) static int dgfx_pcie_link_residencies_show(struct seq_file *m, void *data) { struct xe_device *xe; - struct xe_mmio *mmio; struct drm_printer p; xe = node_to_xe(m->private); p = drm_seq_file_printer(m); guard(xe_pm_runtime)(xe); - mmio = xe_root_tile_mmio(xe); static const struct { u32 offset; @@ -339,7 +341,7 @@ static int dgfx_pcie_link_residencies_show(struct seq_file *m, void *data) }; for (int i = 0; i < ARRAY_SIZE(residencies); i++) - read_residency_counter(xe, mmio, residencies[i].offset, residencies[i].name, &p); + read_residency_counter(xe, residencies[i].offset, residencies[i].name, &p); return 0; } diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c index 2032066d5f49..57b2fbefa4c3 100644 --- a/drivers/gpu/drm/xe/xe_hwmon.c +++ b/drivers/gpu/drm/xe/xe_hwmon.c @@ -512,9 +512,15 @@ xe_hwmon_energy_get(struct xe_hwmon *hwmon, int channel, long *energy) if (hwmon->xe->info.platform == XE_BATTLEMAGE) { u64 pmt_val; + u32 guid; - ret = xe_pmt_telem_read(hwmon->xe->drm.dev, - xe_mmio_read32(mmio, BMG_PUNIT_TELEMETRY_GUID), + ret = xe_vsec_get_guid(hwmon->xe, &guid); + if (ret) { + drm_warn(&hwmon->xe->drm, "PMT device is not available: %d\n", ret); + *energy = 0; + return; + } + ret = xe_pmt_telem_read(hwmon->xe->drm.dev, guid, &pmt_val, BMG_ENERGY_STATUS_PMT_OFFSET, sizeof(pmt_val)); if (ret != sizeof(pmt_val)) { drm_warn(&hwmon->xe->drm, "energy read from pmt failed, ret %d\n", ret); diff --git a/drivers/gpu/drm/xe/xe_pcode.c b/drivers/gpu/drm/xe/xe_pcode.c index 8c901e54f384..fa9f45d565cb 100644 --- a/drivers/gpu/drm/xe/xe_pcode.c +++ b/drivers/gpu/drm/xe/xe_pcode.c @@ -365,11 +365,17 @@ ALLOW_ERROR_INJECTION(xe_pcode_probe_early, ERRNO); /* See xe_pci_probe */ int xe_get_pcode_version(struct xe_device *xe, struct xe_pcode_version *version) { int ret = 0; + u32 guid; guard(xe_pm_runtime)(xe); - ret = xe_pmt_telem_read(xe->drm.dev, - xe_mmio_read32(xe_root_tile_mmio(xe), BMG_PUNIT_TELEMETRY_GUID), + ret = xe_vsec_get_guid(xe, &guid); + if (ret) { + xe_warn(xe, "PMT device is not available: %d\n", ret); + return ret; + } + + ret = xe_pmt_telem_read(xe->drm.dev, guid, (u64 *)version, PUNIT_VERSION_OFFSET, sizeof(*version)); if (ret != sizeof(*version)) { xe_warn(xe, "pcode version read from PMT failed, ret %pe\n", ERR_PTR(ret)); -- 2.43.0