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From: Jim Quinlan <james.quinlan@broadcom.com>
To: linux-pci@vger.kernel.org,
	Nicolas Saenz Julienne <nsaenz@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com,
	james.quinlan@broadcom.com
Cc: "Florian Fainelli" <florian.fainelli@broadcom.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM
	BCM2711/BCM2835 ARM ARCHITECTURE),
	linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM
	BCM2711/BCM2835 ARM ARCHITECTURE),
	linux-kernel@vger.kernel.org (open list)
Subject: [PATCH 06/13] PCI: brcmstb: Declare and assign flag IS_BMIPS
Date: Fri, 11 Sep 2026 19:35:31 -0400	[thread overview]
Message-ID: <20260911233541.1650895-7-james.quinlan@broadcom.com> (raw)
In-Reply-To: <20260911233541.1650895-1-james.quinlan@broadcom.com>

Eliminate a function that evaluates SoC chip IDs and instead declare and
use a flag that indicates the SoC employs a CPU with a variant of the
MIPS-1 ISA.

Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
---
 drivers/pci/controller/pcie-brcmstb.c | 14 ++++++--------
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
index 401898d04d52..8927d1d97f4a 100644
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
@@ -300,7 +300,8 @@ struct inbound_win {
 #define CFG_FLG_HAS_PHY				BIT(0)
 /* The SoC PCIe HW can dump to the console PCIe error info */
 #define CFG_FLG_HAS_ERR_REPORT			BIT(1)
-
+/* SoC uses a Broadcom variant of the MIPS-1 ISA */
+#define CFG_FLG_IS_BMIPS			BIT(2)
 
 struct pcie_cfg_data {
 	const int *offsets;
@@ -361,11 +362,6 @@ struct brcm_pcie {
 	spinlock_t		bridge_lock;
 };
 
-static inline bool is_bmips(const struct brcm_pcie *pcie)
-{
-	return pcie->cfg->soc_base == BCM7435 || pcie->cfg->soc_base == BCM7425;
-}
-
 static int brcm_pcie_bridge_sw_init_set(struct brcm_pcie *pcie, u32 val)
 {
 	unsigned long flags;
@@ -1176,7 +1172,7 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
 		return ret;
 
 	tmp = readl(base + HARD_DEBUG(pcie));
-	if (is_bmips(pcie))
+	if (BFLAG(pcie, IS_BMIPS))
 		tmp &= ~PCIE_BMIPS_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK;
 	else
 		tmp &= ~PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK;
@@ -1189,7 +1185,7 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
 	 * is encoded as 0=128, 1=256, 2=512, 3=Rsvd, for BCM7278 it
 	 * is encoded as 0=Rsvd, 1=128, 2=256, 3=512.
 	 */
-	if (is_bmips(pcie))
+	if (BFLAG(pcie, IS_BMIPS))
 		burst = 0x1; /* 256 bytes */
 	else if (pcie->cfg->soc_base == BCM2711)
 		burst = 0x0; /* 128 bytes */
@@ -2001,6 +1997,7 @@ static const struct pcie_cfg_data bcm7425_cfg = {
 	.num_inbound_wins = 3,
 	.quirks		= CFG_QUIRK_OB_WIN_32BIT_ADDR
 		| CFG_QUIRK_OB_WIN_MAXSZ_128MB,
+	.flags		= CFG_FLG_IS_BMIPS,
 };
 
 static const struct pcie_cfg_data bcm7435_cfg = {
@@ -2011,6 +2008,7 @@ static const struct pcie_cfg_data bcm7435_cfg = {
 	.num_inbound_wins = 3,
 	.quirks		= CFG_QUIRK_OB_WIN_32BIT_ADDR
 		| CFG_QUIRK_OB_WIN_MAXSZ_128MB,
+	.flags		= CFG_FLG_IS_BMIPS,
 };
 
 static const struct pcie_cfg_data bcm7216_cfg = {
-- 
2.34.1



  parent reply	other threads:[~2026-09-11 23:36 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-11 23:35 [PATCH 00/13] PCI: brcmstb: Stop using chip numbers for conditions Jim Quinlan
2026-09-11 23:35 ` [PATCH 01/13] PCI: brcmstb: Remove redundant const specifier for struct fields Jim Quinlan
2026-09-11 23:39   ` sashiko-bot
2026-09-11 23:35 ` [PATCH 02/13] PCI: brcmstb: Use flags u32 instead of bools Jim Quinlan
2026-09-11 23:47   ` sashiko-bot
2026-09-11 23:35 ` [PATCH 03/13] PCI: brcmstb: Add Broadcom quirks macro Jim Quinlan
2026-09-11 23:40   ` sashiko-bot
2026-09-11 23:35 ` [PATCH 04/13] PCI: brcmstb: Declare and assign quirk OB_WIN_32BIT_ADDR Jim Quinlan
2026-09-11 23:42   ` sashiko-bot
2026-09-11 23:35 ` [PATCH 05/13] PCI: brcmstb: Declare and assign quirk OB_WIN_MAXSZ_128MB Jim Quinlan
2026-09-11 23:47   ` sashiko-bot
2026-09-11 23:35 ` Jim Quinlan [this message]
2026-09-11 23:41   ` [PATCH 06/13] PCI: brcmstb: Declare and assign flag IS_BMIPS sashiko-bot
2026-09-11 23:35 ` [PATCH 07/13] PCI: brcmstb: Declare and assign quirk 32BIT_PCI_OPS Jim Quinlan
2026-09-11 23:47   ` sashiko-bot
2026-09-11 23:35 ` [PATCH 08/13] PCI: brcmstb: Declare and assign quirk NO_RGR1_TIMER Jim Quinlan
2026-09-11 23:43   ` sashiko-bot
2026-09-11 23:35 ` [PATCH 09/13] PCI: brcmstb: Declare and assign quirk EARLY_PERST_ASSERT Jim Quinlan
2026-09-11 23:42   ` sashiko-bot
2026-09-11 23:35 ` [PATCH 10/13] PCI: brcmstb: Declare and assign quirk PERST_PCIE_REV_CUTOFF Jim Quinlan
2026-09-11 23:49   ` sashiko-bot
2026-09-11 23:35 ` [PATCH 11/13] PCI: brcmstb: Put max_burst_size setting in cfg_data Jim Quinlan
2026-09-11 23:42   ` sashiko-bot
2026-09-11 23:35 ` [PATCH 12/13] PCI: brcmstb: Use order-0 indexing for inbound BAR window array Jim Quinlan
2026-09-11 23:47   ` sashiko-bot
2026-09-11 23:35 ` [PATCH 13/13] PCI: brcmstb: Split up complicated function into two variants Jim Quinlan
2026-09-11 23:54   ` sashiko-bot

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