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Sat, 12 Sep 2026 05:37:22 -0700 (PDT) Received: from [127.0.1.1] ([209.170.101.129]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-14365ba71cesm13288737c88.13.2026.09.12.05.37.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 12 Sep 2026 05:37:21 -0700 (PDT) From: Eric Chung Date: Sat, 12 Sep 2026 20:36:56 +0800 Subject: [PATCH v13 3/7] dts: k1: enable mmc devices in SPL MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260912-m4-v13-3-71043b29630f@riscstar.com> References: <20260912-m4-v13-0-71043b29630f@riscstar.com> In-Reply-To: <20260912-m4-v13-0-71043b29630f@riscstar.com> To: u-boot-spacemit@groups.io, u-boot@lists.u-boot-project.org, Yao Zi , u-boot@lists.u-boot-project.org Cc: Tom Rini , Tim Ouyang , Leo Liang , Wei Fu , Scott Bambrough , Huan Zhou , Eric Chung , Raymond Mao , Peng Fan , Jaehoon Chung , Bastien Curutchet , Anshul Dalal , Siu Ming Tong , Johan Jonker X-Mailer: b4 0.15.2 X-BeenThere: u-boot@lists.u-boot-project.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.u-boot-project.org Enable eMMC and SD device nodes in SPL stage. And set the bus frequency for mmc device nodes. Remove the redundant device nodes that are delcared in upstream DTS files. Signed-off-by: Eric Chung --- arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi | 12 ++- arch/riscv/dts/k1-musepi-pro-u-boot.dtsi | 136 +++--------------------------- 2 files changed, 21 insertions(+), 127 deletions(-) diff --git a/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi b/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi index 7f9443d69510..3077cdee55d7 100644 --- a/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi +++ b/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi @@ -50,7 +50,6 @@ &i2c2 { bootph-pre-ram; - resets = <&syscon_apbc RESET_TWSI2>; eeprom@50 { bootph-pre-ram; @@ -65,7 +64,6 @@ */ &i2c8 { bootph-pre-ram; - resets = <&syscon_apbc RESET_TWSI8>; pmic@41 { bootph-pre-ram; @@ -89,6 +87,16 @@ }; }; +&emmc { + bootph-pre-ram; + max-frequency = <204800000>; +}; + +&sdhci0 { + bootph-pre-ram; + max-frequency = <204800000>; +}; + &binman { u-boot-spl-ddr { type = "section"; diff --git a/arch/riscv/dts/k1-musepi-pro-u-boot.dtsi b/arch/riscv/dts/k1-musepi-pro-u-boot.dtsi index 8a9a2a09de99..d6299c96949d 100644 --- a/arch/riscv/dts/k1-musepi-pro-u-boot.dtsi +++ b/arch/riscv/dts/k1-musepi-pro-u-boot.dtsi @@ -76,42 +76,15 @@ &i2c2 { bootph-pre-ram; - status = "okay"; - pinctrl-0 = <&i2c2_0_cfg>; - pinctrl-names = "default"; - resets = <&syscon_apbc RESET_TWSI2>; eeprom@50 { bootph-pre-ram; status = "okay"; - compatible = "atmel,24c02"; - reg = <0x50>; - vcc-supply = <&buck3_1v8>; /* EEPROM_VCC1V8 */ - pagesize = <16>; - read-only; - size = <256>; - - nvmem-layout { - compatible = "onie,tlv-layout"; - - mac-address { - #nvmem-cell-cells = <1>; - }; - - num-macs { - }; - - serial-number { - }; - }; }; }; &i2c8 { bootph-pre-ram; - pinctrl-0 = <&i2c8_cfg>; - pinctrl-names = "default"; - resets = <&syscon_apbc RESET_TWSI8>; status = "okay"; pmic@41 { @@ -125,130 +98,43 @@ buck1 { bootph-pre-ram; regulator-name = "vdd_core"; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <3450000>; - regulator-ramp-delay = <5000>; - regulator-always-on; - }; - - buck2 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <3450000>; - regulator-ramp-delay = <5000>; - regulator-always-on; }; buck3_1v8: buck3 { bootph-pre-ram; regulator-name = "vdd_1v8"; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <5000>; - regulator-always-on; - }; - - buck4 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <5000>; - regulator-always-on; - }; - - buck5 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <3450000>; - regulator-ramp-delay = <5000>; - regulator-always-on; - }; - - buck6 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <3450000>; - regulator-ramp-delay = <5000>; - regulator-always-on; }; aldo1 { bootph-pre-ram; regulator-name = "vdd_1v8_mmc"; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <3400000>; - regulator-boot-on; - }; - - aldo2 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <3400000>; - }; - - aldo3 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <3400000>; }; - aldo4 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <3400000>; - }; - - dldo1 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <3400000>; - regulator-boot-on; - }; - - dldo2 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <3400000>; - }; - - dldo3 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <3400000>; - }; - - dldo4 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <3400000>; - regulator-always-on; - }; - - dldo5 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <3400000>; - }; - - dldo6 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <3400000>; - regulator-always-on; - }; - - dldo7 { - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <3400000>; - }; }; }; }; &qspi { bootph-pre-ram; - pinctrl-names = "default"; - pinctrl-0 = <&qspi_cfg>; status = "okay"; flash@0 { bootph-pre-ram; - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <26500000>; - m25p,fast-read; - broken-flash-reset; status = "okay"; }; }; +&emmc { + bootph-pre-ram; + max-frequency = <204800000>; +}; + +&sdhci0 { + bootph-pre-ram; + cd-gpios = <&gpio K1_GPIO(80) (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + max-frequency = <204800000>; +}; + &binman { u-boot-spl-ddr { type = "section"; -- 2.51.0