From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 736821DCB24 for ; Sat, 12 Sep 2026 20:59:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789246767; cv=none; b=CNWeqEUxnuCocPepgc39njq8GK4KmB7+k9QaV4qXojmkXXx1TnBfpNgCh2HTM0lU1mjIWMYgLcpRA2pGj2g9U1sDaS5hEHGWEdjk8xuzFkaL70k+dmdOo5AKV4X3+HU+MK08eT0O+u4Rkq7Tjl0XxvOntwjLQTOnNrjIrnw2k+g= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789246767; c=relaxed/simple; bh=A+J7w5lPWtr40D1EPbZtiQ1L64TcPxmvJyDeFukcq5g=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=YEXu6uhEKRi14dg6rlbhgR5v7eBy1/mX2hCD6xiInaGUFrHb8BZkvmUWM2++4N90W0KqGbBYpYPjJH5zkob50+gWEk2PlUDkC2LRNFgcGyNluaIZm4jGck4eOkLj5bnDyNOmx9d2jcsMaskjLnrT8Ocl784CcQ+RC09Urx77Rw0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fP36dwxq; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fP36dwxq" Received: by smtp.kernel.org (Postfix) with ESMTPSA id DB0A41F00899; Sat, 12 Sep 2026 20:59:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1789246766; bh=7u+a3bL1a/E+e7Qm+xFuaKTEu4RDBo/ewWkRgbZrzBY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=fP36dwxqDA92U60ZdrLcDcMp4cKAOLMJf/np8IRjn2akTXPBQtUZVU0Pck7O95OMw C9WaOMv5dejG52SFZTrj3V+ZNnaLxVTmJjQ7qdytUV+tWWz4lVcst3lEGOeGcxO399 kDn6FVsMibYZF0ceVQo/Tr5lCMBEdHLppXx0OzN2y7nW0lsCUQJr5TzxvrC34XrFTv kOHgv/SgK16pIsxCprgLdx12U8WmnPc9s1DnoHU1YPKPrrMKzuDgs4kGMVIblMIYJ2 DM7L31fffS+jg53JjZzMjHGSWBB4oKwvNQfTTdfzp0RW5kWrwApWVhQclduVxegQKB 0yzYoAccMD+1g== From: Sasha Levin To: stable@vger.kernel.org Cc: Alex Deucher , =?UTF-8?q?Christian=20K=C3=B6nig?= , Sasha Levin Subject: [PATCH 6.6.y 2/3] drm/amdgpu: plumb timedout fence through to force completion Date: Sat, 12 Sep 2026 16:59:22 -0400 Message-ID: <20260912205923.3934930-2-sashal@kernel.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260912205923.3934930-1-sashal@kernel.org> References: <2026090944-uranium-paramedic-0401@gregkh> <20260912205923.3934930-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Alex Deucher [ Upstream commit c184df870db1e328691ea0fbb7d0e59efd9d3f9f ] When we do a full adapter reset, if we know the timedout fence mark the fence with -ETIME rather than -ECANCELED so it gets properly handled by userspace. v2: rebase Reviewed-by: Christian König Signed-off-by: Alex Deucher Stable backport notes: - Keep the two-argument force-completion API and its existing callers so 6760f5cb12d2 can add the UVD fence-driver initialization check unchanged. - Use &job->hw_fence.base for 6.6's embedded hardware fence. Preserve the existing scheduler reset and job-fence clearing flow used for resubmission. - Drop SDMA, VCN and JPEG reset hunks whose functions do not exist here; vcn_v5_0_1.c is also absent. Do not import newer queue-reset helpers or their declarations. No functions are added by this backport. - Restore the direct return after amdgpu_ring_undo() on VM-flush failure. The earlier ccea36c819df backport introduced a goto free_fence without the label or the newer fence-allocation model it depends on. In 6.6, amdgpu_ib_schedule() has no locally allocated fence to free on this path. This restores the original 6.6 error handling and fixes the build without importing the unrelated fence-lifetime conversion. [ sashal: Reduced backport -- upstream c184df870db1e touches 9 file(s), this backport carries 6. Not backported here: drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c This note is generated from the file lists only; see the resolution record for the reasoning. ] Stable-dep-of: 6760f5cb12d2 ("drm/amdgpu: avoid force-completing uninitialized UVD rings") Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 ++++- drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 25 ++++++++++++++++++--- drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 3 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 2 +- 6 files changed, 32 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c index 256cc15fc9b5a..2044f5cca3514 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c @@ -1947,7 +1947,7 @@ static int amdgpu_debugfs_ib_preempt(void *data, u64 val) /* swap out the old fences */ amdgpu_ib_preempt_fences_swap(ring, fences); - amdgpu_fence_driver_force_completion(ring); + amdgpu_fence_driver_force_completion(ring, NULL); /* resubmit unfinished jobs */ amdgpu_ib_preempt_job_recovery(&ring->sched); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 892a40c439637..60e1d9cda3a8b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -4894,6 +4894,7 @@ int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev, { int i, r = 0; struct amdgpu_job *job = NULL; + struct dma_fence *fence = NULL; bool need_full_reset = test_bit(AMDGPU_NEED_FULL_RESET, &reset_context->flags); @@ -4907,6 +4908,9 @@ int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev, amdgpu_fence_driver_isr_toggle(adev, true); + if (job) + fence = &job->hw_fence.base; + /* block all schedulers and reset given job's ring */ for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { struct amdgpu_ring *ring = adev->rings[i]; @@ -4920,7 +4924,7 @@ int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev, amdgpu_fence_driver_clear_job_fences(ring); /* after all hw jobs are reset, hw fence is meaningless, so force_completion */ - amdgpu_fence_driver_force_completion(ring); + amdgpu_fence_driver_force_completion(ring, fence); } amdgpu_fence_driver_isr_toggle(adev, false); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c index 017dd494d0a2f..93208bd5631af 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c @@ -595,7 +595,7 @@ void amdgpu_fence_driver_hw_fini(struct amdgpu_device *adev) r = -ENODEV; /* no need to trigger GPU reset as we are unloading */ if (r) - amdgpu_fence_driver_force_completion(ring); + amdgpu_fence_driver_force_completion(ring, NULL); if (!drm_dev_is_unplugged(adev_to_drm(adev)) && ring->fence_drv.irq_src && @@ -740,11 +740,30 @@ void amdgpu_fence_driver_set_error(struct amdgpu_ring *ring, int error) * amdgpu_fence_driver_force_completion - force signal latest fence of ring * * @ring: fence of the ring to signal + * @timedout_fence: fence of the timedout job * */ -void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring) +void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring, + struct dma_fence *timedout_fence) { - amdgpu_fence_driver_set_error(ring, -ECANCELED); + struct amdgpu_fence_driver *drv = &ring->fence_drv; + unsigned long flags; + + spin_lock_irqsave(&drv->lock, flags); + for (unsigned int i = 0; i <= drv->num_fences_mask; ++i) { + struct dma_fence *fence; + + fence = rcu_dereference_protected(drv->fences[i], + lockdep_is_held(&drv->lock)); + if (fence && !dma_fence_is_signaled_locked(fence)) { + if (fence == timedout_fence) + dma_fence_set_error(fence, -ETIME); + else + dma_fence_set_error(fence, -ECANCELED); + } + } + spin_unlock_irqrestore(&drv->lock, flags); + amdgpu_fence_write(ring, ring->fence_drv.sync_seq); amdgpu_fence_process(ring); } diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c index 2cce0a378ecb3..806ec5d021995 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c @@ -217,7 +217,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned int num_ibs, r = amdgpu_vm_flush(ring, job, need_pipe_sync); if (r) { amdgpu_ring_undo(ring); - goto free_fence; + return r; } } diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h index dc17e2ce84d07..b40dbe2f4fc25 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h @@ -143,7 +143,8 @@ extern const struct drm_sched_backend_ops amdgpu_sched_ops; void amdgpu_fence_driver_clear_job_fences(struct amdgpu_ring *ring); void amdgpu_fence_driver_set_error(struct amdgpu_ring *ring, int error); -void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring); +void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring, + struct dma_fence *timedout_fence); int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring); int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c index aab293ec3417e..b6047dea0a1c6 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c @@ -511,7 +511,7 @@ int amdgpu_uvd_resume(struct amdgpu_device *adev) } memset_io(ptr, 0, size); /* to restore uvd fence seq */ - amdgpu_fence_driver_force_completion(&adev->uvd.inst[i].ring); + amdgpu_fence_driver_force_completion(&adev->uvd.inst[i].ring, NULL); } } return 0; -- 2.53.0