From: sashiko-bot@kernel.org
To: hsyemail2@gmail.com
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org,
linux-hwmon@vger.kernel.org
Subject: Re: [PATCH v3] hwmon: (lm75) Add support for Nuvoton NCT7715
Date: Tue, 15 Sep 2026 05:28:42 +0000 [thread overview]
Message-ID: <20260915052843.397FF1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260915052021.6959-1-syhuang3@nuvoton.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] hwmon: lm75: NCT7715 initialization fails to clear bit 14 of config register
--
commit 7bd04866b8e88a3003be284539483cdda6599844
Author: Sheng-Yuan Huang <syhuang3@nuvoton.com>
hwmon: (lm75) Add support for Nuvoton NCT7715
This commit adds support for the Nuvoton NCT7715 temperature sensor to the
lm75 hardware monitoring driver. It introduces a new device parameter entry
that reuses much of the TMP112 handling for configuration and alarms.
> diff --git a/drivers/hwmon/lm75.c b/drivers/hwmon/lm75.c
> --- a/drivers/hwmon/lm75.c
> +++ b/drivers/hwmon/lm75.c
[ ... ]
> @@ -259,6 +260,16 @@ static const struct lm75_params device_params[] = {
> .sample_times = (unsigned int []){ 30, 60, 120, 240 },
> .resolutions = (u8 []) {9, 10, 11, 12 },
> },
> + [nct7715] = {
> + .config_reg_16bits = true,
> + .set_mask = 0x8060, /* 12-bit mode, 4 samples / second */
> + .clr_mask = 1 << 7, /* no one-shot mode */
[Severity: Medium]
Will this leave bit 14 unchanged if it was previously set by a bootloader or
left over from a warm reboot?
During driver probe, lm75_generic_probe() calls lm75_write_config() to
initialize LM75_REG_CONF. The regmap update mask used is:
clr_mask | set_mask | LM75_SHUTDOWN
For nct7715, set_mask is 0x8060 and clr_mask is 0x0080. Bit 14 (0x4000) is
missing from both masks. Because of this, regmap_update_bits() will
silently ignore the 0 in bit 14 of set_mask and preserve its prior value
from the hardware configuration register.
If bit 14 remains set, can the sensor operate at 8 Hz instead of the
intended 4 Hz, leading to a mismatch between the hardware state and the
driver state which expects and reports a 250ms interval?
Should 0x4000 be included in clr_mask to ensure the hardware is properly
initialized to 4 samples / second?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260915052021.6959-1-syhuang3@nuvoton.com?part=1
next prev parent reply other threads:[~2026-09-15 5:28 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-15 5:20 [PATCH v3] hwmon: (lm75) Add support for Nuvoton NCT7715 hsyemail2
2026-09-15 5:28 ` sashiko-bot [this message]
2026-09-15 6:33 ` Sheng-Yuan Huang
2026-09-15 14:37 ` Guenter Roeck
2026-09-17 1:20 ` Sheng-Yuan Huang
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