From: sashiko-bot@kernel.org
To: "Nicolin Chen" <nicolinc@nvidia.com>
Cc: linux-pci@vger.kernel.org
Subject: Re: [PATCH v5 11/15] iommu/arm-smmu-v3: Discard partial PRI faults on PRIQ overflow
Date: Tue, 15 Sep 2026 16:57:17 +0000 [thread overview]
Message-ID: <20260915165717.9A0331F000FF@smtp.kernel.org> (raw)
In-Reply-To: <be109e135724e8a436588489677a28c664407eff.1789446520.git.nicolinc@nvidia.com>
> On PRIQ overflow, partial requests stored via report_partial_fault() whose
> LAST-page entry was lost stay in iopf_param->partial. Drop them by calling
> iopf_queue_discard_partial(), matching intel-iommu's handling.
>
> Do it only after the queue is fully drained, since the visible entries all
> precede the loss point: a group whose LAST-page entry is still in the queue
> gets assembled before the discard, rather than losing its stored partials
> to it.
>
> Nothing can arrive in between, as an active overflow inhibits new entries
> from being written to the PRI queue until a final CONS write acknowledges
> it (IHI0070 8.1).
>
> Suggested-by: Harsha Vardhan V <harsha.v@oss.qualcomm.com>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
> Assisted-by: LLM
> Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1789446520.git.nicolinc@nvidia.com?part=11
next prev parent reply other threads:[~2026-09-15 16:57 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-15 16:38 [PATCH v5 00/15] iommu/arm-smmu-v3: Add PRI support Nicolin Chen
2026-09-15 16:38 ` [PATCH v5 01/15] iommu/arm-smmu-v3: Disable the impl before disabling the SMMU on shutdown Nicolin Chen
2026-09-15 16:51 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 02/15] iommu/arm-smmu-v3: Add arm_smmu_attach_release() Nicolin Chen
2026-09-15 16:48 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 03/15] iommu/arm-smmu-v3: Add Q_POS() macro Nicolin Chen
2026-09-15 16:42 ` sashiko-bot
2026-09-15 23:19 ` Jonathan Cameron
2026-09-15 16:38 ` [PATCH v5 04/15] iommu/arm-smmu-v3: Drain in-flight fault events on domain detach Nicolin Chen
2026-09-15 16:51 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-23 22:33 ` Nicolin Chen
2026-09-23 23:39 ` Jason Gunthorpe
2026-09-24 1:42 ` Nicolin Chen
2026-09-24 14:03 ` Jason Gunthorpe
2026-09-28 22:29 ` Nicolin Chen
2026-09-29 19:46 ` Nicolin Chen
2026-09-15 16:38 ` [PATCH v5 05/15] iommu/arm-smmu-v3: Flush in-flight fault work " Nicolin Chen
2026-09-15 16:57 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 06/15] iommu/arm-smmu-v3: Allocate IOPF queue without FEAT_SVA Nicolin Chen
2026-09-15 16:47 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 07/15] iommu/arm-smmu-v3: Submit CMDQ_OP_PRI_RESP for IOPF event Nicolin Chen
2026-09-15 17:02 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 08/15] iommu/arm-smmu-v3: Disable the queue IRQs before disabling the SMMU Nicolin Chen
2026-09-15 16:48 ` sashiko-bot
2026-09-15 23:21 ` Jonathan Cameron
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-24 1:12 ` Nicolin Chen
2026-09-15 16:38 ` [PATCH v5 09/15] iommu/arm-smmu-v3: Disable PRI when no IRQ handler is registered Nicolin Chen
2026-09-15 16:53 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 10/15] iommu/arm-smmu-v3: Support PRI Page Request in arm_smmu_handle_ppr() Nicolin Chen
2026-09-15 16:52 ` sashiko-bot
2026-09-15 23:22 ` Jonathan Cameron
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 11/15] iommu/arm-smmu-v3: Discard partial PRI faults on PRIQ overflow Nicolin Chen
2026-09-15 16:57 ` sashiko-bot [this message]
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 12/15] iommu/arm-smmu-v3: Allocate IOPF queue for ARM_SMMU_FEAT_PRI Nicolin Chen
2026-09-15 16:56 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 13/15] PCI/ATS: Add PRI stubs Nicolin Chen
2026-09-15 16:51 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 14/15] PCI/ATS: Export pci_enable_pri() and pci_reset_pri() Nicolin Chen
2026-09-15 16:49 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 15/15] iommu/arm-smmu-v3: Enable PRI for PCI device in arm_smmu_probe_device() Nicolin Chen
2026-09-15 16:59 ` sashiko-bot
2026-10-04 16:50 ` [PATCH v5 00/15] iommu/arm-smmu-v3: Add PRI support Will Deacon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260915165717.9A0331F000FF@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=nicolinc@nvidia.com \
--cc=sashiko-reviews@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.