Re: [PATCH 3/3] mfd: mt6397-core: Add mt6397 AUXADC support

[Lee Jones <lee@kernel.org>]

On Wed, 16 Sep 2026, sashiko-bot@kernel.org wrote:

> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Medium] iio: mt6397-auxadc: hardware state leak on error paths

Please review, explain or fix the Sashiko review(s).

If this is a set, this request includes the other patches too.

> --
> 
> commit e17dd59587f106380c3ede8aa27c118b33350f88
> Author: Ryan Brue <ryanbrue.dev@gmail.com>
> 
> mfd: mt6397-core: Add mt6397 AUXADC support
> 
> The mt6397 PMIC includes an AUXADC. Register the AUXADC in the mt6397
> devices array to allow the corresponding driver to probe using compatible
> string.
> 
> > diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c
> > index 9ec9519965887..5d5f816492aaa 100644
> > --- a/drivers/mfd/mt6397-core.c
> > +++ b/drivers/mfd/mt6397-core.c
> > @@ -261,6 +261,9 @@ static const struct mfd_cell mt6359_devs[] = {
> >  
> >  static const struct mfd_cell mt6397_devs[] = {
> >  	{
> > +		.name = "mt6397-auxadc",
> > +		.of_compatible = "mediatek,mt6397-auxadc",
> 
> [Severity: Medium]
> Enabling this device exposes a hardware state leak on error paths in the
> mt6397-auxadc driver.
> 
> In mt6397_auxadc_isense_enable(), if the second regmap write fails, does the
> function return without unwinding the first write, leaving
> MT6397_CHR_CON16_ADCIN_VSEN_EN incorrectly enabled?
> 
> drivers/iio/adc/mt6397-auxadc.c:mt6397_auxadc_isense_enable() {
>     ...
> 	ret = regmap_update_bits(map, MT6397_CHR_CON16,
> 				 MT6397_CHR_CON16_ADCIN_SEL,
> 				 MT6397_CHR_CON16_ADCIN_VSEN_EN);
> 	if (ret)
> 		return ret;
> 
> 	return regmap_set_bits(map, MT6397_AUXADC_CON14,
> 			       MT6397_AUXADC_CON14_CH0_NORM_SEL |
> 			       MT6397_AUXADC_CON14_CH0_LBAT_SEL);
> }
> 
> Similarly, during teardown in mt6397_auxadc_isense_disable(), the use of the
> ?: operator short-circuits the sequence.
> 
> If the first regmap_clear_bits() fails, will it abandon the cleanup and skip
> disabling MT6397_CHR_CON16_ADCIN_SEL?
> 
> drivers/iio/adc/mt6397-auxadc.c:mt6397_auxadc_isense_disable() {
>     ...
> 	ret = regmap_clear_bits(map, MT6397_AUXADC_CON14,
> 				MT6397_AUXADC_CON14_CH0_NORM_SEL |
> 				MT6397_AUXADC_CON14_CH0_LBAT_SEL);
> 
> 	return ret ?: regmap_clear_bits(map, MT6397_CHR_CON16,
> 					MT6397_CHR_CON16_ADCIN_SEL);
> }
> 
> A similar issue appears in mt6397_auxadc_battemp_bias().
> 
> Does this function lack a rollback path if the second or third regmap
> operation fails, permanently leaking previously modified register states?
> 
> drivers/iio/adc/mt6397-auxadc.c:mt6397_auxadc_battemp_bias() {
>     ...
> 	if (on) {
> 		ret = regmap_set_bits(map, MT6397_AUXADC_CON0,
> 				      MT6397_AUXADC_CON0_BUF_PWD_ON);
> 		if (ret)
> 			return ret;
> 		ret = regmap_set_bits(map, MT6397_AUXADC_CON0,
> 				      MT6397_AUXADC_CON0_BUF_PWD_B);
> 		if (ret)
> 			return ret;
> 		return regmap_set_bits(map, MT6397_CHR_CON7,
> 				       MT6397_CHR_CON7_BATON_TDET_EN);
> 	}
>     ...
> }
> 
> > +	}, {
> >  		.name = "mt6397-rtc",
> 
> -- 
> Sashiko AI review · https://sashiko.dev/#/patchset/20260915-rbrue-suez-upstreaming-mt6397-auxadc-v1-0-d35d2ac3d6f0@gmail.com?part=3

-- 
Lee Jones