From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CB10DC982C3 for ; Wed, 16 Sep 2026 14:53:33 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1x6qvr-0006cS-4H; Wed, 16 Sep 2026 10:48:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x6qvo-0006c7-VD for qemu-arm@nongnu.org; Wed, 16 Sep 2026 10:48:17 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1x6qvl-0006SJ-QH for qemu-arm@nongnu.org; Wed, 16 Sep 2026 10:48:16 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1789570093; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=e8i2vuqnFKuWkX5qslhpvJPs44SxMMtPwaLpKERBO9g=; b=MyT+tRBLTr1MdKzLWGsTX2wqv6BI+atiArU4MV5WcmEkqHgoWNBsD+17EAsxuIvm13H3sW 94Hp135qbCAAVKHKD9qt9HlWOQBI9Ke6CQKjm5C52gZZQBqm4h64glUa7JV8QAzxWvPcuv 6PmP+jVqprOdG0EFTmTi5SFd/BdsuaA= Received: from mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-490-ad5iVQQlOo6sSzMQwzVneA-1; Wed, 16 Sep 2026 10:48:11 -0400 X-MC-Unique: ad5iVQQlOo6sSzMQwzVneA-1 X-Mimecast-MFC-AGG-ID: ad5iVQQlOo6sSzMQwzVneA_1789570089 Received: from mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.17]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 41B31184B3A1; Wed, 16 Sep 2026 14:48:09 +0000 (UTC) Received: from laptop.redhat.corp (headnet04.pony-001.prod.iad2.dc.redhat.com [10.2.32.116]) by mx-prod-int-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 544C319560AB; Wed, 16 Sep 2026 14:48:04 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvmarm@lists.linux.dev, peter.maydell@linaro.org, shaju.abraham@nutanix.com, khushit.shah@nutanix.com, yangjinqian1@huawei.com, cohuck@redhat.com, richard.henderson@linaro.org, sebott@redhat.com, skolothumtho@nvidia.com, philmd@oss.qualcomm.com Cc: maz@kernel.org, oliver.upton@linux.dev, pbonzini@redhat.com, armbru@redhat.com, berrange@redhat.com, abologna@redhat.com, jdenemar@redhat.com Subject: [PATCH v9 07/26] target/arm/cpu-idregs.h.inc: generate with script Date: Wed, 16 Sep 2026 16:45:30 +0200 Message-ID: <20260916144721.751810-8-eric.auger@redhat.com> In-Reply-To: <20260916144721.751810-1-eric.auger@redhat.com> References: <20260916144721.751810-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 X-Mimecast-MFC-PROC-ID: ab4YzlL3mdMJK7hZMWDuE46WJ-S7xRkrLiExg5HF6tA_1789570089 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: 8bit content-type: text/plain; charset="US-ASCII"; x-default=true Received-SPF: pass client-ip=170.10.133.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, UPPERCASE_50_75=0.008 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Generate ID reg definitions with the scripts/update-aarch64-cpu-sysreg-properties.py based on AARCHMRS_OPENSOURCE_A_profile_FAT-2026-03 Registers.json Each register and fields are described with this pattern: IDREG_START(REG) IDREG_FIELD(REG, FIELD, SHIFT, LENGTH) ... IDREG_END(REG) Signed-off-by: Eric Auger Suggested-by: Khushit Shah Suggested-by: Shaju Abraham --- target/arm/cpu-idregs.h.inc | 607 ++++++++++++++++++++++++++++++++++++ 1 file changed, 607 insertions(+) create mode 100644 target/arm/cpu-idregs.h.inc diff --git a/target/arm/cpu-idregs.h.inc b/target/arm/cpu-idregs.h.inc new file mode 100644 index 0000000000..c9745e2fb6 --- /dev/null +++ b/target/arm/cpu-idregs.h.inc @@ -0,0 +1,607 @@ +/* AUTOMATICALLY GENERATED, DO NOT MODIFY */ + +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +/* IDREG_START(REG) */ +/* IDREG_FIELD(REG, FIELD, SHIFT, LENGTH) */ +/* ... */ +/* IDREG_END(REG) */ + +IDREG_START(AIDR_EL1) +IDREG_END(AIDR_EL1) + +IDREG_START(CLIDR_EL1) + IDREG_FIELD(CLIDR_EL1, Ttype7, 45, 2) + IDREG_FIELD(CLIDR_EL1, Ttype6, 43, 2) + IDREG_FIELD(CLIDR_EL1, Ttype5, 41, 2) + IDREG_FIELD(CLIDR_EL1, Ttype4, 39, 2) + IDREG_FIELD(CLIDR_EL1, Ttype3, 37, 2) + IDREG_FIELD(CLIDR_EL1, Ttype2, 35, 2) + IDREG_FIELD(CLIDR_EL1, Ttype1, 33, 2) + IDREG_FIELD(CLIDR_EL1, ICB, 30, 3) + IDREG_FIELD(CLIDR_EL1, LoUU, 27, 3) + IDREG_FIELD(CLIDR_EL1, LoC, 24, 3) + IDREG_FIELD(CLIDR_EL1, LoUIS, 21, 3) + IDREG_FIELD(CLIDR_EL1, Ctype7, 18, 3) + IDREG_FIELD(CLIDR_EL1, Ctype6, 15, 3) + IDREG_FIELD(CLIDR_EL1, Ctype5, 12, 3) + IDREG_FIELD(CLIDR_EL1, Ctype4, 9, 3) + IDREG_FIELD(CLIDR_EL1, Ctype3, 6, 3) + IDREG_FIELD(CLIDR_EL1, Ctype2, 3, 3) + IDREG_FIELD(CLIDR_EL1, Ctype1, 0, 3) +IDREG_END(CLIDR_EL1) + +IDREG_START(CTR_EL0) + IDREG_FIELD(CTR_EL0, TminLine, 32, 6) + IDREG_FIELD(CTR_EL0, DIC, 29, 1) + IDREG_FIELD(CTR_EL0, IDC, 28, 1) + IDREG_FIELD(CTR_EL0, CWG, 24, 4) + IDREG_FIELD(CTR_EL0, ERG, 20, 4) + IDREG_FIELD(CTR_EL0, DminLine, 16, 4) + IDREG_FIELD(CTR_EL0, L1Ip, 14, 2) + IDREG_FIELD(CTR_EL0, IminLine, 0, 4) +IDREG_END(CTR_EL0) + +IDREG_START(DCZID_EL0) + IDREG_FIELD(DCZID_EL0, TBS, 5, 4) + IDREG_FIELD(DCZID_EL0, DZP, 4, 1) + IDREG_FIELD(DCZID_EL0, BS, 0, 4) +IDREG_END(DCZID_EL0) + +IDREG_START(GMID_EL1) + IDREG_FIELD(GMID_EL1, BS, 0, 4) +IDREG_END(GMID_EL1) + +IDREG_START(ID_AA64AFR0_EL1) +IDREG_END(ID_AA64AFR0_EL1) + +IDREG_START(ID_AA64AFR1_EL1) +IDREG_END(ID_AA64AFR1_EL1) + +IDREG_START(ID_AA64DFR0_EL1) + IDREG_FIELD(ID_AA64DFR0_EL1, HPMN0, 60, 4) + IDREG_FIELD(ID_AA64DFR0_EL1, ExtTrcBuff, 56, 4) + IDREG_FIELD(ID_AA64DFR0_EL1, BRBE, 52, 4) + IDREG_FIELD(ID_AA64DFR0_EL1, MTPMU, 48, 4) + IDREG_FIELD(ID_AA64DFR0_EL1, TraceBuffer, 44, 4) + IDREG_FIELD(ID_AA64DFR0_EL1, TraceFilt, 40, 4) + IDREG_FIELD(ID_AA64DFR0_EL1, DoubleLock, 36, 4) + IDREG_FIELD(ID_AA64DFR0_EL1, PMSVer, 32, 4) + IDREG_FIELD(ID_AA64DFR0_EL1, CTX_CMPs, 28, 4) + IDREG_FIELD(ID_AA64DFR0_EL1, WRPs, 20, 4) + IDREG_FIELD(ID_AA64DFR0_EL1, PMSS, 16, 4) + IDREG_FIELD(ID_AA64DFR0_EL1, BRPs, 12, 4) + IDREG_FIELD(ID_AA64DFR0_EL1, PMUVer, 8, 4) + IDREG_FIELD(ID_AA64DFR0_EL1, TraceVer, 4, 4) + IDREG_FIELD(ID_AA64DFR0_EL1, DebugVer, 0, 4) +IDREG_END(ID_AA64DFR0_EL1) + +IDREG_START(ID_AA64DFR1_EL1) + IDREG_FIELD(ID_AA64DFR1_EL1, ABL_CMPs, 56, 8) + IDREG_FIELD(ID_AA64DFR1_EL1, DPFZS, 52, 4) + IDREG_FIELD(ID_AA64DFR1_EL1, EBEP, 48, 4) + IDREG_FIELD(ID_AA64DFR1_EL1, ITE, 44, 4) + IDREG_FIELD(ID_AA64DFR1_EL1, ABLE, 40, 4) + IDREG_FIELD(ID_AA64DFR1_EL1, PMICNTR, 36, 4) + IDREG_FIELD(ID_AA64DFR1_EL1, SPMU, 32, 4) + IDREG_FIELD(ID_AA64DFR1_EL1, CTX_CMPs, 24, 8) + IDREG_FIELD(ID_AA64DFR1_EL1, WRPs, 16, 8) + IDREG_FIELD(ID_AA64DFR1_EL1, BRPs, 8, 8) + IDREG_FIELD(ID_AA64DFR1_EL1, SYSPMUID, 0, 8) +IDREG_END(ID_AA64DFR1_EL1) + +IDREG_START(ID_AA64DFR2_EL1) + IDREG_FIELD(ID_AA64DFR2_EL1, TRBE_EXC, 24, 4) + IDREG_FIELD(ID_AA64DFR2_EL1, SPE_nVM, 20, 4) + IDREG_FIELD(ID_AA64DFR2_EL1, SPE_EXC, 16, 4) + IDREG_FIELD(ID_AA64DFR2_EL1, BWE, 4, 4) + IDREG_FIELD(ID_AA64DFR2_EL1, STEP, 0, 4) +IDREG_END(ID_AA64DFR2_EL1) + +IDREG_START(ID_AA64FPFR0_EL1) + IDREG_FIELD(ID_AA64FPFR0_EL1, F8CVT, 31, 1) + IDREG_FIELD(ID_AA64FPFR0_EL1, F8FMA, 30, 1) + IDREG_FIELD(ID_AA64FPFR0_EL1, F8DP4, 29, 1) + IDREG_FIELD(ID_AA64FPFR0_EL1, F8DP2, 28, 1) + IDREG_FIELD(ID_AA64FPFR0_EL1, F8MM8, 27, 1) + IDREG_FIELD(ID_AA64FPFR0_EL1, F8MM4, 26, 1) + IDREG_FIELD(ID_AA64FPFR0_EL1, F16MM2, 15, 1) + IDREG_FIELD(ID_AA64FPFR0_EL1, F8E4M3, 1, 1) + IDREG_FIELD(ID_AA64FPFR0_EL1, F8E5M2, 0, 1) +IDREG_END(ID_AA64FPFR0_EL1) + +IDREG_START(ID_AA64ISAR0_EL1) + IDREG_FIELD(ID_AA64ISAR0_EL1, RNDR, 60, 4) + IDREG_FIELD(ID_AA64ISAR0_EL1, TLB, 56, 4) + IDREG_FIELD(ID_AA64ISAR0_EL1, TS, 52, 4) + IDREG_FIELD(ID_AA64ISAR0_EL1, FHM, 48, 4) + IDREG_FIELD(ID_AA64ISAR0_EL1, DP, 44, 4) + IDREG_FIELD(ID_AA64ISAR0_EL1, SM4, 40, 4) + IDREG_FIELD(ID_AA64ISAR0_EL1, SM3, 36, 4) + IDREG_FIELD(ID_AA64ISAR0_EL1, SHA3, 32, 4) + IDREG_FIELD(ID_AA64ISAR0_EL1, RDM, 28, 4) + IDREG_FIELD(ID_AA64ISAR0_EL1, Atomic, 20, 4) + IDREG_FIELD(ID_AA64ISAR0_EL1, CRC32, 16, 4) + IDREG_FIELD(ID_AA64ISAR0_EL1, SHA2, 12, 4) + IDREG_FIELD(ID_AA64ISAR0_EL1, SHA1, 8, 4) + IDREG_FIELD(ID_AA64ISAR0_EL1, AES, 4, 4) +IDREG_END(ID_AA64ISAR0_EL1) + +IDREG_START(ID_AA64ISAR1_EL1) + IDREG_FIELD(ID_AA64ISAR1_EL1, LS64, 60, 4) + IDREG_FIELD(ID_AA64ISAR1_EL1, XS, 56, 4) + IDREG_FIELD(ID_AA64ISAR1_EL1, I8MM, 52, 4) + IDREG_FIELD(ID_AA64ISAR1_EL1, DGH, 48, 4) + IDREG_FIELD(ID_AA64ISAR1_EL1, BF16, 44, 4) + IDREG_FIELD(ID_AA64ISAR1_EL1, SPECRES, 40, 4) + IDREG_FIELD(ID_AA64ISAR1_EL1, SB, 36, 4) + IDREG_FIELD(ID_AA64ISAR1_EL1, FRINTTS, 32, 4) + IDREG_FIELD(ID_AA64ISAR1_EL1, GPI, 28, 4) + IDREG_FIELD(ID_AA64ISAR1_EL1, GPA, 24, 4) + IDREG_FIELD(ID_AA64ISAR1_EL1, LRCPC, 20, 4) + IDREG_FIELD(ID_AA64ISAR1_EL1, FCMA, 16, 4) + IDREG_FIELD(ID_AA64ISAR1_EL1, JSCVT, 12, 4) + IDREG_FIELD(ID_AA64ISAR1_EL1, API, 8, 4) + IDREG_FIELD(ID_AA64ISAR1_EL1, APA, 4, 4) + IDREG_FIELD(ID_AA64ISAR1_EL1, DPB, 0, 4) +IDREG_END(ID_AA64ISAR1_EL1) + +IDREG_START(ID_AA64ISAR2_EL1) + IDREG_FIELD(ID_AA64ISAR2_EL1, ATS1A, 60, 4) + IDREG_FIELD(ID_AA64ISAR2_EL1, LUT, 56, 4) + IDREG_FIELD(ID_AA64ISAR2_EL1, CSSC, 52, 4) + IDREG_FIELD(ID_AA64ISAR2_EL1, RPRFM, 48, 4) + IDREG_FIELD(ID_AA64ISAR2_EL1, PCDPHINT, 44, 4) + IDREG_FIELD(ID_AA64ISAR2_EL1, PRFMSLC, 40, 4) + IDREG_FIELD(ID_AA64ISAR2_EL1, SYSINSTR_128, 36, 4) + IDREG_FIELD(ID_AA64ISAR2_EL1, SYSREG_128, 32, 4) + IDREG_FIELD(ID_AA64ISAR2_EL1, CLRBHB, 28, 4) + IDREG_FIELD(ID_AA64ISAR2_EL1, PAC_frac, 24, 4) + IDREG_FIELD(ID_AA64ISAR2_EL1, BC, 20, 4) + IDREG_FIELD(ID_AA64ISAR2_EL1, MOPS, 16, 4) + IDREG_FIELD(ID_AA64ISAR2_EL1, APA3, 12, 4) + IDREG_FIELD(ID_AA64ISAR2_EL1, GPA3, 8, 4) + IDREG_FIELD(ID_AA64ISAR2_EL1, RPRES, 4, 4) + IDREG_FIELD(ID_AA64ISAR2_EL1, WFxT, 0, 4) +IDREG_END(ID_AA64ISAR2_EL1) + +IDREG_START(ID_AA64ISAR3_EL1) + IDREG_FIELD(ID_AA64ISAR3_EL1, LSCP, 44, 4) + IDREG_FIELD(ID_AA64ISAR3_EL1, LSCSHINT, 40, 4) + IDREG_FIELD(ID_AA64ISAR3_EL1, MTETC, 36, 4) + IDREG_FIELD(ID_AA64ISAR3_EL1, PAC_frac2, 32, 4) + IDREG_FIELD(ID_AA64ISAR3_EL1, FPRCVT, 28, 4) + IDREG_FIELD(ID_AA64ISAR3_EL1, LSUI, 24, 4) + IDREG_FIELD(ID_AA64ISAR3_EL1, OCCMO, 20, 4) + IDREG_FIELD(ID_AA64ISAR3_EL1, LSFE, 16, 4) + IDREG_FIELD(ID_AA64ISAR3_EL1, PACM, 12, 4) + IDREG_FIELD(ID_AA64ISAR3_EL1, TLBIW, 8, 4) + IDREG_FIELD(ID_AA64ISAR3_EL1, FAMINMAX, 4, 4) + IDREG_FIELD(ID_AA64ISAR3_EL1, CPA, 0, 4) +IDREG_END(ID_AA64ISAR3_EL1) + +IDREG_START(ID_AA64MMFR0_EL1) + IDREG_FIELD(ID_AA64MMFR0_EL1, ECV, 60, 4) + IDREG_FIELD(ID_AA64MMFR0_EL1, FGT, 56, 4) + IDREG_FIELD(ID_AA64MMFR0_EL1, ExS, 44, 4) + IDREG_FIELD(ID_AA64MMFR0_EL1, TGran4_2, 40, 4) + IDREG_FIELD(ID_AA64MMFR0_EL1, TGran64_2, 36, 4) + IDREG_FIELD(ID_AA64MMFR0_EL1, TGran16_2, 32, 4) + IDREG_FIELD(ID_AA64MMFR0_EL1, TGran4, 28, 4) + IDREG_FIELD(ID_AA64MMFR0_EL1, TGran64, 24, 4) + IDREG_FIELD(ID_AA64MMFR0_EL1, TGran16, 20, 4) + IDREG_FIELD(ID_AA64MMFR0_EL1, BigEndEL0, 16, 4) + IDREG_FIELD(ID_AA64MMFR0_EL1, SNSMem, 12, 4) + IDREG_FIELD(ID_AA64MMFR0_EL1, BigEnd, 8, 4) + IDREG_FIELD(ID_AA64MMFR0_EL1, ASIDBits, 4, 4) + IDREG_FIELD(ID_AA64MMFR0_EL1, PARange, 0, 4) +IDREG_END(ID_AA64MMFR0_EL1) + +IDREG_START(ID_AA64MMFR1_EL1) + IDREG_FIELD(ID_AA64MMFR1_EL1, ECBHB, 60, 4) + IDREG_FIELD(ID_AA64MMFR1_EL1, CMOW, 56, 4) + IDREG_FIELD(ID_AA64MMFR1_EL1, TIDCP1, 52, 4) + IDREG_FIELD(ID_AA64MMFR1_EL1, nTLBPA, 48, 4) + IDREG_FIELD(ID_AA64MMFR1_EL1, AFP, 44, 4) + IDREG_FIELD(ID_AA64MMFR1_EL1, HCX, 40, 4) + IDREG_FIELD(ID_AA64MMFR1_EL1, ETS, 36, 4) + IDREG_FIELD(ID_AA64MMFR1_EL1, TWED, 32, 4) + IDREG_FIELD(ID_AA64MMFR1_EL1, XNX, 28, 4) + IDREG_FIELD(ID_AA64MMFR1_EL1, SpecSEI, 24, 4) + IDREG_FIELD(ID_AA64MMFR1_EL1, PAN, 20, 4) + IDREG_FIELD(ID_AA64MMFR1_EL1, LO, 16, 4) + IDREG_FIELD(ID_AA64MMFR1_EL1, HPDS, 12, 4) + IDREG_FIELD(ID_AA64MMFR1_EL1, VH, 8, 4) + IDREG_FIELD(ID_AA64MMFR1_EL1, VMIDBits, 4, 4) + IDREG_FIELD(ID_AA64MMFR1_EL1, HAFDBS, 0, 4) +IDREG_END(ID_AA64MMFR1_EL1) + +IDREG_START(ID_AA64MMFR2_EL1) + IDREG_FIELD(ID_AA64MMFR2_EL1, E0PD, 60, 4) + IDREG_FIELD(ID_AA64MMFR2_EL1, EVT, 56, 4) + IDREG_FIELD(ID_AA64MMFR2_EL1, BBM, 52, 4) + IDREG_FIELD(ID_AA64MMFR2_EL1, TTL, 48, 4) + IDREG_FIELD(ID_AA64MMFR2_EL1, FWB, 40, 4) + IDREG_FIELD(ID_AA64MMFR2_EL1, IDS, 36, 4) + IDREG_FIELD(ID_AA64MMFR2_EL1, AT, 32, 4) + IDREG_FIELD(ID_AA64MMFR2_EL1, ST, 28, 4) + IDREG_FIELD(ID_AA64MMFR2_EL1, NV, 24, 4) + IDREG_FIELD(ID_AA64MMFR2_EL1, CCIDX, 20, 4) + IDREG_FIELD(ID_AA64MMFR2_EL1, VARange, 16, 4) + IDREG_FIELD(ID_AA64MMFR2_EL1, IESB, 12, 4) + IDREG_FIELD(ID_AA64MMFR2_EL1, LSM, 8, 4) + IDREG_FIELD(ID_AA64MMFR2_EL1, UAO, 4, 4) + IDREG_FIELD(ID_AA64MMFR2_EL1, CnP, 0, 4) +IDREG_END(ID_AA64MMFR2_EL1) + +IDREG_START(ID_AA64MMFR3_EL1) + IDREG_FIELD(ID_AA64MMFR3_EL1, Spec_FPACC, 60, 4) + IDREG_FIELD(ID_AA64MMFR3_EL1, ADERR, 56, 4) + IDREG_FIELD(ID_AA64MMFR3_EL1, SDERR, 52, 4) + IDREG_FIELD(ID_AA64MMFR3_EL1, ANERR, 44, 4) + IDREG_FIELD(ID_AA64MMFR3_EL1, SNERR, 40, 4) + IDREG_FIELD(ID_AA64MMFR3_EL1, D128_2, 36, 4) + IDREG_FIELD(ID_AA64MMFR3_EL1, D128, 32, 4) + IDREG_FIELD(ID_AA64MMFR3_EL1, MEC, 28, 4) + IDREG_FIELD(ID_AA64MMFR3_EL1, AIE, 24, 4) + IDREG_FIELD(ID_AA64MMFR3_EL1, S2POE, 20, 4) + IDREG_FIELD(ID_AA64MMFR3_EL1, S1POE, 16, 4) + IDREG_FIELD(ID_AA64MMFR3_EL1, S2PIE, 12, 4) + IDREG_FIELD(ID_AA64MMFR3_EL1, S1PIE, 8, 4) + IDREG_FIELD(ID_AA64MMFR3_EL1, SCTLRX, 4, 4) + IDREG_FIELD(ID_AA64MMFR3_EL1, TCRX, 0, 4) +IDREG_END(ID_AA64MMFR3_EL1) + +IDREG_START(ID_AA64MMFR4_EL1) + IDREG_FIELD(ID_AA64MMFR4_EL1, MTEFGT, 60, 4) + IDREG_FIELD(ID_AA64MMFR4_EL1, SCRX, 56, 4) + IDREG_FIELD(ID_AA64MMFR4_EL1, TEV, 52, 4) + IDREG_FIELD(ID_AA64MMFR4_EL1, TPS, 48, 4) + IDREG_FIELD(ID_AA64MMFR4_EL1, SRMASK, 44, 4) + IDREG_FIELD(ID_AA64MMFR4_EL1, TLBID, 40, 4) + IDREG_FIELD(ID_AA64MMFR4_EL1, E3DSE, 36, 4) + IDREG_FIELD(ID_AA64MMFR4_EL1, EAESR, 32, 4) + IDREG_FIELD(ID_AA64MMFR4_EL1, RMEGDI, 28, 4) + IDREG_FIELD(ID_AA64MMFR4_EL1, E2H0, 24, 4) + IDREG_FIELD(ID_AA64MMFR4_EL1, NV_frac, 20, 4) + IDREG_FIELD(ID_AA64MMFR4_EL1, FGWTE3, 16, 4) + IDREG_FIELD(ID_AA64MMFR4_EL1, HACDBS, 12, 4) + IDREG_FIELD(ID_AA64MMFR4_EL1, ASID2, 8, 4) + IDREG_FIELD(ID_AA64MMFR4_EL1, EIESB, 4, 4) + IDREG_FIELD(ID_AA64MMFR4_EL1, PoPS, 0, 4) +IDREG_END(ID_AA64MMFR4_EL1) + +IDREG_START(ID_AA64PFR0_EL1) + IDREG_FIELD(ID_AA64PFR0_EL1, CSV3, 60, 4) + IDREG_FIELD(ID_AA64PFR0_EL1, CSV2, 56, 4) + IDREG_FIELD(ID_AA64PFR0_EL1, RME, 52, 4) + IDREG_FIELD(ID_AA64PFR0_EL1, DIT, 48, 4) + IDREG_FIELD(ID_AA64PFR0_EL1, AMU, 44, 4) + IDREG_FIELD(ID_AA64PFR0_EL1, MPAM, 40, 4) + IDREG_FIELD(ID_AA64PFR0_EL1, SEL2, 36, 4) + IDREG_FIELD(ID_AA64PFR0_EL1, SVE, 32, 4) + IDREG_FIELD(ID_AA64PFR0_EL1, RAS, 28, 4) + IDREG_FIELD(ID_AA64PFR0_EL1, GIC, 24, 4) + IDREG_FIELD(ID_AA64PFR0_EL1, AdvSIMD, 20, 4) + IDREG_FIELD(ID_AA64PFR0_EL1, FP, 16, 4) + IDREG_FIELD(ID_AA64PFR0_EL1, EL3, 12, 4) + IDREG_FIELD(ID_AA64PFR0_EL1, EL2, 8, 4) + IDREG_FIELD(ID_AA64PFR0_EL1, EL1, 4, 4) + IDREG_FIELD(ID_AA64PFR0_EL1, EL0, 0, 4) +IDREG_END(ID_AA64PFR0_EL1) + +IDREG_START(ID_AA64PFR1_EL1) + IDREG_FIELD(ID_AA64PFR1_EL1, PFAR, 60, 4) + IDREG_FIELD(ID_AA64PFR1_EL1, DF2, 56, 4) + IDREG_FIELD(ID_AA64PFR1_EL1, MTEX, 52, 4) + IDREG_FIELD(ID_AA64PFR1_EL1, THE, 48, 4) + IDREG_FIELD(ID_AA64PFR1_EL1, GCS, 44, 4) + IDREG_FIELD(ID_AA64PFR1_EL1, MTE_frac, 40, 4) + IDREG_FIELD(ID_AA64PFR1_EL1, NMI, 36, 4) + IDREG_FIELD(ID_AA64PFR1_EL1, CSV2_frac, 32, 4) + IDREG_FIELD(ID_AA64PFR1_EL1, RNDR_trap, 28, 4) + IDREG_FIELD(ID_AA64PFR1_EL1, SME, 24, 4) + IDREG_FIELD(ID_AA64PFR1_EL1, MPAM_frac, 16, 4) + IDREG_FIELD(ID_AA64PFR1_EL1, RAS_frac, 12, 4) + IDREG_FIELD(ID_AA64PFR1_EL1, MTE, 8, 4) + IDREG_FIELD(ID_AA64PFR1_EL1, SSBS, 4, 4) + IDREG_FIELD(ID_AA64PFR1_EL1, BT, 0, 4) +IDREG_END(ID_AA64PFR1_EL1) + +IDREG_START(ID_AA64PFR2_EL1) + IDREG_FIELD(ID_AA64PFR2_EL1, VMTETCL, 44, 4) + IDREG_FIELD(ID_AA64PFR2_EL1, VMTETC, 40, 4) + IDREG_FIELD(ID_AA64PFR2_EL1, VMTE, 36, 4) + IDREG_FIELD(ID_AA64PFR2_EL1, FPMR, 32, 4) + IDREG_FIELD(ID_AA64PFR2_EL1, MPAM2, 28, 4) + IDREG_FIELD(ID_AA64PFR2_EL1, FGDT, 24, 4) + IDREG_FIELD(ID_AA64PFR2_EL1, MTEEIRG, 20, 4) + IDREG_FIELD(ID_AA64PFR2_EL1, UINJ, 16, 4) + IDREG_FIELD(ID_AA64PFR2_EL1, GCIE, 12, 4) + IDREG_FIELD(ID_AA64PFR2_EL1, MTEFAR, 8, 4) + IDREG_FIELD(ID_AA64PFR2_EL1, MTESTOREONLY, 4, 4) + IDREG_FIELD(ID_AA64PFR2_EL1, MTEPERM, 0, 4) +IDREG_END(ID_AA64PFR2_EL1) + +IDREG_START(ID_AA64SMFR0_EL1) + IDREG_FIELD(ID_AA64SMFR0_EL1, FA64, 63, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, LUT6, 61, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, LUTv2, 60, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, SMEver, 56, 4) + IDREG_FIELD(ID_AA64SMFR0_EL1, I16I64, 52, 4) + IDREG_FIELD(ID_AA64SMFR0_EL1, F64F64, 48, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, I16I32, 44, 4) + IDREG_FIELD(ID_AA64SMFR0_EL1, B16B16, 43, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, F16F16, 42, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, F8F16, 41, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, F8F32, 40, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, I8I32, 36, 4) + IDREG_FIELD(ID_AA64SMFR0_EL1, F16F32, 35, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, B16F32, 34, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, BI32I32, 33, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, F32F32, 32, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, SF8FMA, 30, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, SF8DP4, 29, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, SF8DP2, 28, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, SBitPerm, 25, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, AES, 24, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, SFEXPA, 23, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, STMOP, 16, 1) + IDREG_FIELD(ID_AA64SMFR0_EL1, SMOP4, 0, 1) +IDREG_END(ID_AA64SMFR0_EL1) + +IDREG_START(ID_AA64ZFR0_EL1) + IDREG_FIELD(ID_AA64ZFR0_EL1, F64MM, 56, 4) + IDREG_FIELD(ID_AA64ZFR0_EL1, F32MM, 52, 4) + IDREG_FIELD(ID_AA64ZFR0_EL1, F16MM, 48, 4) + IDREG_FIELD(ID_AA64ZFR0_EL1, I8MM, 44, 4) + IDREG_FIELD(ID_AA64ZFR0_EL1, SM4, 40, 4) + IDREG_FIELD(ID_AA64ZFR0_EL1, SHA3, 32, 4) + IDREG_FIELD(ID_AA64ZFR0_EL1, B16B16, 24, 4) + IDREG_FIELD(ID_AA64ZFR0_EL1, BF16, 20, 4) + IDREG_FIELD(ID_AA64ZFR0_EL1, BitPerm, 16, 4) + IDREG_FIELD(ID_AA64ZFR0_EL1, EltPerm, 12, 4) + IDREG_FIELD(ID_AA64ZFR0_EL1, AES, 4, 4) + IDREG_FIELD(ID_AA64ZFR0_EL1, SVEver, 0, 4) +IDREG_END(ID_AA64ZFR0_EL1) + +IDREG_START(ID_AFR0_EL1) +IDREG_END(ID_AFR0_EL1) + +IDREG_START(ID_DFR0_EL1) + IDREG_FIELD(ID_DFR0_EL1, TraceFilt, 28, 4) + IDREG_FIELD(ID_DFR0_EL1, PerfMon, 24, 4) + IDREG_FIELD(ID_DFR0_EL1, MProfDbg, 20, 4) + IDREG_FIELD(ID_DFR0_EL1, MMapTrc, 16, 4) + IDREG_FIELD(ID_DFR0_EL1, CopTrc, 12, 4) + IDREG_FIELD(ID_DFR0_EL1, MMapDbg, 8, 4) + IDREG_FIELD(ID_DFR0_EL1, CopSDbg, 4, 4) + IDREG_FIELD(ID_DFR0_EL1, CopDbg, 0, 4) +IDREG_END(ID_DFR0_EL1) + +IDREG_START(ID_DFR1_EL1) + IDREG_FIELD(ID_DFR1_EL1, HPMN0, 4, 4) + IDREG_FIELD(ID_DFR1_EL1, MTPMU, 0, 4) +IDREG_END(ID_DFR1_EL1) + +IDREG_START(ID_ISAR0_EL1) + IDREG_FIELD(ID_ISAR0_EL1, Divide, 24, 4) + IDREG_FIELD(ID_ISAR0_EL1, Debug, 20, 4) + IDREG_FIELD(ID_ISAR0_EL1, Coproc, 16, 4) + IDREG_FIELD(ID_ISAR0_EL1, CmpBranch, 12, 4) + IDREG_FIELD(ID_ISAR0_EL1, BitField, 8, 4) + IDREG_FIELD(ID_ISAR0_EL1, BitCount, 4, 4) + IDREG_FIELD(ID_ISAR0_EL1, Swap, 0, 4) +IDREG_END(ID_ISAR0_EL1) + +IDREG_START(ID_ISAR1_EL1) + IDREG_FIELD(ID_ISAR1_EL1, Jazelle, 28, 4) + IDREG_FIELD(ID_ISAR1_EL1, Interwork, 24, 4) + IDREG_FIELD(ID_ISAR1_EL1, Immediate, 20, 4) + IDREG_FIELD(ID_ISAR1_EL1, IfThen, 16, 4) + IDREG_FIELD(ID_ISAR1_EL1, Extend, 12, 4) + IDREG_FIELD(ID_ISAR1_EL1, Except_AR, 8, 4) + IDREG_FIELD(ID_ISAR1_EL1, Except, 4, 4) + IDREG_FIELD(ID_ISAR1_EL1, Endian, 0, 4) +IDREG_END(ID_ISAR1_EL1) + +IDREG_START(ID_ISAR2_EL1) + IDREG_FIELD(ID_ISAR2_EL1, Reversal, 28, 4) + IDREG_FIELD(ID_ISAR2_EL1, PSR_AR, 24, 4) + IDREG_FIELD(ID_ISAR2_EL1, MultU, 20, 4) + IDREG_FIELD(ID_ISAR2_EL1, MultS, 16, 4) + IDREG_FIELD(ID_ISAR2_EL1, Mult, 12, 4) + IDREG_FIELD(ID_ISAR2_EL1, MultiAccessInt, 8, 4) + IDREG_FIELD(ID_ISAR2_EL1, MemHint, 4, 4) + IDREG_FIELD(ID_ISAR2_EL1, LoadStore, 0, 4) +IDREG_END(ID_ISAR2_EL1) + +IDREG_START(ID_ISAR3_EL1) + IDREG_FIELD(ID_ISAR3_EL1, T32EE, 28, 4) + IDREG_FIELD(ID_ISAR3_EL1, TrueNOP, 24, 4) + IDREG_FIELD(ID_ISAR3_EL1, T32Copy, 20, 4) + IDREG_FIELD(ID_ISAR3_EL1, TabBranch, 16, 4) + IDREG_FIELD(ID_ISAR3_EL1, SynchPrim, 12, 4) + IDREG_FIELD(ID_ISAR3_EL1, SVC, 8, 4) + IDREG_FIELD(ID_ISAR3_EL1, SIMD, 4, 4) + IDREG_FIELD(ID_ISAR3_EL1, Saturate, 0, 4) +IDREG_END(ID_ISAR3_EL1) + +IDREG_START(ID_ISAR4_EL1) + IDREG_FIELD(ID_ISAR4_EL1, SWP_frac, 28, 4) + IDREG_FIELD(ID_ISAR4_EL1, PSR_M, 24, 4) + IDREG_FIELD(ID_ISAR4_EL1, SynchPrim_frac, 20, 4) + IDREG_FIELD(ID_ISAR4_EL1, Barrier, 16, 4) + IDREG_FIELD(ID_ISAR4_EL1, SMC, 12, 4) + IDREG_FIELD(ID_ISAR4_EL1, Writeback, 8, 4) + IDREG_FIELD(ID_ISAR4_EL1, WithShifts, 4, 4) + IDREG_FIELD(ID_ISAR4_EL1, Unpriv, 0, 4) +IDREG_END(ID_ISAR4_EL1) + +IDREG_START(ID_ISAR5_EL1) + IDREG_FIELD(ID_ISAR5_EL1, VCMA, 28, 4) + IDREG_FIELD(ID_ISAR5_EL1, RDM, 24, 4) + IDREG_FIELD(ID_ISAR5_EL1, CRC32, 16, 4) + IDREG_FIELD(ID_ISAR5_EL1, SHA2, 12, 4) + IDREG_FIELD(ID_ISAR5_EL1, SHA1, 8, 4) + IDREG_FIELD(ID_ISAR5_EL1, AES, 4, 4) + IDREG_FIELD(ID_ISAR5_EL1, SEVL, 0, 4) +IDREG_END(ID_ISAR5_EL1) + +IDREG_START(ID_ISAR6_EL1) + IDREG_FIELD(ID_ISAR6_EL1, CLRBHB, 28, 4) + IDREG_FIELD(ID_ISAR6_EL1, I8MM, 24, 4) + IDREG_FIELD(ID_ISAR6_EL1, BF16, 20, 4) + IDREG_FIELD(ID_ISAR6_EL1, SPECRES, 16, 4) + IDREG_FIELD(ID_ISAR6_EL1, SB, 12, 4) + IDREG_FIELD(ID_ISAR6_EL1, FHM, 8, 4) + IDREG_FIELD(ID_ISAR6_EL1, DP, 4, 4) + IDREG_FIELD(ID_ISAR6_EL1, JSCVT, 0, 4) +IDREG_END(ID_ISAR6_EL1) + +IDREG_START(ID_MMFR0_EL1) + IDREG_FIELD(ID_MMFR0_EL1, InnerShr, 28, 4) + IDREG_FIELD(ID_MMFR0_EL1, FCSE, 24, 4) + IDREG_FIELD(ID_MMFR0_EL1, AuxReg, 20, 4) + IDREG_FIELD(ID_MMFR0_EL1, TCM, 16, 4) + IDREG_FIELD(ID_MMFR0_EL1, ShareLvl, 12, 4) + IDREG_FIELD(ID_MMFR0_EL1, OuterShr, 8, 4) + IDREG_FIELD(ID_MMFR0_EL1, PMSA, 4, 4) + IDREG_FIELD(ID_MMFR0_EL1, VMSA, 0, 4) +IDREG_END(ID_MMFR0_EL1) + +IDREG_START(ID_MMFR1_EL1) + IDREG_FIELD(ID_MMFR1_EL1, BPred, 28, 4) + IDREG_FIELD(ID_MMFR1_EL1, L1TstCln, 24, 4) + IDREG_FIELD(ID_MMFR1_EL1, L1Uni, 20, 4) + IDREG_FIELD(ID_MMFR1_EL1, L1Hvd, 16, 4) + IDREG_FIELD(ID_MMFR1_EL1, L1UniSW, 12, 4) + IDREG_FIELD(ID_MMFR1_EL1, L1HvdSW, 8, 4) + IDREG_FIELD(ID_MMFR1_EL1, L1UniVA, 4, 4) + IDREG_FIELD(ID_MMFR1_EL1, L1HvdVA, 0, 4) +IDREG_END(ID_MMFR1_EL1) + +IDREG_START(ID_MMFR2_EL1) + IDREG_FIELD(ID_MMFR2_EL1, HWAccFlg, 28, 4) + IDREG_FIELD(ID_MMFR2_EL1, WFIStall, 24, 4) + IDREG_FIELD(ID_MMFR2_EL1, MemBarr, 20, 4) + IDREG_FIELD(ID_MMFR2_EL1, UniTLB, 16, 4) + IDREG_FIELD(ID_MMFR2_EL1, HvdTLB, 12, 4) + IDREG_FIELD(ID_MMFR2_EL1, L1HvdRng, 8, 4) + IDREG_FIELD(ID_MMFR2_EL1, L1HvdBG, 4, 4) + IDREG_FIELD(ID_MMFR2_EL1, L1HvdFG, 0, 4) +IDREG_END(ID_MMFR2_EL1) + +IDREG_START(ID_MMFR3_EL1) + IDREG_FIELD(ID_MMFR3_EL1, Supersec, 28, 4) + IDREG_FIELD(ID_MMFR3_EL1, CMemSz, 24, 4) + IDREG_FIELD(ID_MMFR3_EL1, CohWalk, 20, 4) + IDREG_FIELD(ID_MMFR3_EL1, PAN, 16, 4) + IDREG_FIELD(ID_MMFR3_EL1, MaintBcst, 12, 4) + IDREG_FIELD(ID_MMFR3_EL1, BPMaint, 8, 4) + IDREG_FIELD(ID_MMFR3_EL1, CMaintSW, 4, 4) + IDREG_FIELD(ID_MMFR3_EL1, CMaintVA, 0, 4) +IDREG_END(ID_MMFR3_EL1) + +IDREG_START(ID_MMFR4_EL1) + IDREG_FIELD(ID_MMFR4_EL1, EVT, 28, 4) + IDREG_FIELD(ID_MMFR4_EL1, CCIDX, 24, 4) + IDREG_FIELD(ID_MMFR4_EL1, LSM, 20, 4) + IDREG_FIELD(ID_MMFR4_EL1, HPDS, 16, 4) + IDREG_FIELD(ID_MMFR4_EL1, CnP, 12, 4) + IDREG_FIELD(ID_MMFR4_EL1, XNX, 8, 4) + IDREG_FIELD(ID_MMFR4_EL1, AC2, 4, 4) + IDREG_FIELD(ID_MMFR4_EL1, SpecSEI, 0, 4) +IDREG_END(ID_MMFR4_EL1) + +IDREG_START(ID_MMFR5_EL1) + IDREG_FIELD(ID_MMFR5_EL1, nTLBPA, 4, 4) + IDREG_FIELD(ID_MMFR5_EL1, ETS, 0, 4) +IDREG_END(ID_MMFR5_EL1) + +IDREG_START(ID_PFR0_EL1) + IDREG_FIELD(ID_PFR0_EL1, RAS, 28, 4) + IDREG_FIELD(ID_PFR0_EL1, DIT, 24, 4) + IDREG_FIELD(ID_PFR0_EL1, AMU, 20, 4) + IDREG_FIELD(ID_PFR0_EL1, CSV2, 16, 4) + IDREG_FIELD(ID_PFR0_EL1, State3, 12, 4) + IDREG_FIELD(ID_PFR0_EL1, State2, 8, 4) + IDREG_FIELD(ID_PFR0_EL1, State1, 4, 4) + IDREG_FIELD(ID_PFR0_EL1, State0, 0, 4) +IDREG_END(ID_PFR0_EL1) + +IDREG_START(ID_PFR1_EL1) + IDREG_FIELD(ID_PFR1_EL1, GIC, 28, 4) + IDREG_FIELD(ID_PFR1_EL1, Virt_frac, 24, 4) + IDREG_FIELD(ID_PFR1_EL1, Sec_frac, 20, 4) + IDREG_FIELD(ID_PFR1_EL1, GenTimer, 16, 4) + IDREG_FIELD(ID_PFR1_EL1, Virtualization, 12, 4) + IDREG_FIELD(ID_PFR1_EL1, MProgMod, 8, 4) + IDREG_FIELD(ID_PFR1_EL1, Security, 4, 4) + IDREG_FIELD(ID_PFR1_EL1, ProgMod, 0, 4) +IDREG_END(ID_PFR1_EL1) + +IDREG_START(ID_PFR2_EL1) + IDREG_FIELD(ID_PFR2_EL1, RAS_frac, 8, 4) + IDREG_FIELD(ID_PFR2_EL1, SSBS, 4, 4) + IDREG_FIELD(ID_PFR2_EL1, CSV3, 0, 4) +IDREG_END(ID_PFR2_EL1) + +IDREG_START(MIDR_EL1) + IDREG_FIELD(MIDR_EL1, Implementer, 24, 8) + IDREG_FIELD(MIDR_EL1, Variant, 20, 4) + IDREG_FIELD(MIDR_EL1, Architecture, 16, 4) + IDREG_FIELD(MIDR_EL1, PartNum, 4, 12) + IDREG_FIELD(MIDR_EL1, Revision, 0, 4) +IDREG_END(MIDR_EL1) + +IDREG_START(MPIDR_EL1) + IDREG_FIELD(MPIDR_EL1, Aff3, 32, 8) + IDREG_FIELD(MPIDR_EL1, U, 30, 1) + IDREG_FIELD(MPIDR_EL1, MT, 24, 1) + IDREG_FIELD(MPIDR_EL1, Aff2, 16, 8) + IDREG_FIELD(MPIDR_EL1, Aff1, 8, 8) + IDREG_FIELD(MPIDR_EL1, Aff0, 0, 8) +IDREG_END(MPIDR_EL1) + +IDREG_START(MVFR0_EL1) + IDREG_FIELD(MVFR0_EL1, FPRound, 28, 4) + IDREG_FIELD(MVFR0_EL1, FPShVec, 24, 4) + IDREG_FIELD(MVFR0_EL1, FPSqrt, 20, 4) + IDREG_FIELD(MVFR0_EL1, FPDivide, 16, 4) + IDREG_FIELD(MVFR0_EL1, FPTrap, 12, 4) + IDREG_FIELD(MVFR0_EL1, FPDP, 8, 4) + IDREG_FIELD(MVFR0_EL1, FPSP, 4, 4) + IDREG_FIELD(MVFR0_EL1, SIMDReg, 0, 4) +IDREG_END(MVFR0_EL1) + +IDREG_START(MVFR1_EL1) + IDREG_FIELD(MVFR1_EL1, SIMDFMAC, 28, 4) + IDREG_FIELD(MVFR1_EL1, FPHP, 24, 4) + IDREG_FIELD(MVFR1_EL1, SIMDHP, 20, 4) + IDREG_FIELD(MVFR1_EL1, SIMDSP, 16, 4) + IDREG_FIELD(MVFR1_EL1, SIMDInt, 12, 4) + IDREG_FIELD(MVFR1_EL1, SIMDLS, 8, 4) + IDREG_FIELD(MVFR1_EL1, FPDNaN, 4, 4) + IDREG_FIELD(MVFR1_EL1, FPFtZ, 0, 4) +IDREG_END(MVFR1_EL1) + +IDREG_START(MVFR2_EL1) + IDREG_FIELD(MVFR2_EL1, FPMisc, 4, 4) + IDREG_FIELD(MVFR2_EL1, SIMDMisc, 0, 4) +IDREG_END(MVFR2_EL1) + +IDREG_START(REVIDR_EL1) +IDREG_END(REVIDR_EL1) + +IDREG_START(SMIDR_EL1) + IDREG_FIELD(SMIDR_EL1, NSMC, 56, 4) + IDREG_FIELD(SMIDR_EL1, HIP, 52, 4) + IDREG_FIELD(SMIDR_EL1, Affinity2, 32, 20) + IDREG_FIELD(SMIDR_EL1, Implementer, 24, 8) + IDREG_FIELD(SMIDR_EL1, Revision, 16, 8) + IDREG_FIELD(SMIDR_EL1, SMPS, 15, 1) + IDREG_FIELD(SMIDR_EL1, SH, 13, 2) + IDREG_FIELD(SMIDR_EL1, Affinity, 0, 12) +IDREG_END(SMIDR_EL1) + -- 2.53.0