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Peter Anvin" , Andrey Konovalov , linux-kernel@vger.kernel.org, x86@kernel.org, bpf@vger.kernel.org, kasan-dev@googlegroups.com, linux-mm@kvack.org, kernel-team@meta.com Subject: [PATCH v3 5/5] x86/cpu: Don't transiently clear the boot CPU's capabilities Date: Wed, 16 Sep 2026 12:52:03 -0700 Message-ID: <20260916195203.1099646-6-ihor.solodrai@linux.dev> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260916195203.1099646-1-ihor.solodrai@linux.dev> References: <20260916195203.1099646-1-ihor.solodrai@linux.dev> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Stat-Signature: nngsne547tqdwd7ho6hekotc1foguzk3 X-Rspam-User: X-Rspamd-Queue-Id: 7C0D54000D X-Rspamd-Server: rspam03 X-HE-Tag: 1789588374-852889 X-HE-Meta: U2FsdGVkX19hlIn/y359HL36xduNT+uIJzxc7+9d7pDPo4ORZgJn9qnhnZvYGIYIJt5sarsAtCXCFgU4ytes1t/cpVSScUBF9WgE8bsw/jGc7F8ZO3E0VHfp1Jrq9ShjbsKNQggEm0gV2AQ3s+GhYK9NSKhHM0iKvy6fptRgOuTV7McqsIdL7m4onCe7RH9jotjj2mcaUwUbLSsyc8PwXRrSjCUtAQhFK0+iumc/EaTI6C6UvSF9n9ImhJC9SLjGez0OGFy6R19IUWPxXVmzTrPQkegrGAg+gygrn/vK7jzRd1enlUqoAxqJiY6E8sK8Fryo0f7wujn91BUvlV+iBTKJa8KPgQC3z1XCJRIyr5LjoFJNeQPXy0TfO28Y65T9og/wwLF06pUCsAzSqgKhLXX2yUsVZWy58fX9+xDhb+VqZjJnGiWHjov50cLOLK9kwmA2DvLyFSPjbHoUTcoFvMcAVn2JzQC6FVAMCNnDM2/4CSGVm5uZHSTNi8WGUyufV7gJ63/Ux937K3Hcrips50cuKxiSFGb3/vL4YwXekxDIgcwBIIBwPKj14P7ndv9lQ8htqxiEHyICGLCPadcZ2MS5ZDWOKe0hMivFysNL4xWu2Yxpra8iHIkGf4QtOHfHjPfLfN5DJaYNz0OsQBBBglNuXr/aY6O9WoZNlc8zOsIa3L47jdXAku9tHQUtq5/rDLWxWsIEyX42BX+V0uedzn63r1wDlK5G+mrB4IocAuvdSFmGD8BeGuQPFMrpas/SJkdiggNDacWe9evzfwgIZJmgRapDd+DPWyXEHvfPuC6iQhkoiWZoW9GEggpieOrwlYfH22+eIK+T/vIBjoLrOeROxm/WrGTDu1TrLoyr82H7zynygNYwogklLvHlpZR26hWMJ7OBOwAo6SZAu71x923/mwoeQn6SGJzfkFAELBdU9GfWUgAOz69ioDwFsWgpv8ubrAqBup0Nz95WPLY s4fZUqdd cjCBpDOeP1LzCBelhKxgdjALyPnQJT25xCd5VpEi9CFqf03yVec7zPWazZPSPEtd2q1eXZ8029JG7q0thCFaq3Ye7S3k6Xp5vRhq7TD24AI17KtwvfLro/ypJcPOIL/4l+1lu/wSzW1OwGzt5USRsp6eLdxcT9rzIADgP5cwti65L0WNCm6FLDSXfGFFRx1mWNGgekZxNq19A+F4STCixZDGeQ+zIU28LlGCpS0ZQWmxVg8UA0Z0wKDfz42tLuQ2UKfp8UXBrzuUuZ+zh0W80JnTGmOoWQT750UdWHw9C7at7RMNaCVFcLrPRwMPgPy+vGD8lXjWiiccS7fg= Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On the boot CPU identify_cpu() runs from arch_cpu_finalize_init(), with interrupts enabled and before alternatives are patched. So cpu_feature_enabled() still evaluates against boot_cpu_data. identify_cpu() rebuilds c->x86_capability from scratch: the reset zeroes the array and the CPUID rescan fills it in again. An interrupt delivered in that window finds X86_FEATURE_LA57 clear in boot_cpu_data, so pgtable_l5_enabled() is false and KASAN checks a 5-level address against the 4-level addressability limit. The result is a bogus "wild-memory-access" report, and under kasan_multi_shot a report storm that wedges the boot. The boot CPU has already been scanned by early_identify_cpu(), with interrupts disabled, and its capabilities cannot have changed since. Reset only the CPUs which have not been scanned yet. The window is as old as identify_cpu() rebuilding the capabilities. Commit 39b9552281ab ("x86/mm: Optimize boot-time paging mode switching cost") merely let KASAN notice it by making pgtable_l5_enabled() read the feature bit. So no Fixes: tag. Closes: https://lore.kernel.org/bpf/20260610175651.647515-1-ihor.solodrai@linux.dev/ Signed-off-by: Ihor Solodrai --- arch/x86/kernel/cpu/common.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 83d613d07997..496ffe429496 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1998,8 +1998,6 @@ static void identify_cpu(struct cpuinfo_x86 *c) c->loops_per_jiffy = loops_per_jiffy; - init_cpu_info(c); - if (!cpuid_feature()) identify_cpu_without_cpuid(c); @@ -2184,6 +2182,7 @@ void identify_secondary_cpu(unsigned int cpu) *c = boot_cpu_data; c->cpu_index = cpu; + init_cpu_info(c); identify_cpu(c); x86_spec_ctrl_setup_ap(); update_srbds_msr(); -- 2.55.0