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From: Jason Gunthorpe <jgg@nvidia.com>
To: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Jonathan Corbet <corbet@lwn.net>,
	iommu@lists.linux.dev, "Joerg Roedel (AMD)" <joro@8bytes.org>,
	Jean-Philippe Brucker <jpb@kernel.org>,
	linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
	Randy Dunlap <rdunlap@infradead.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Shuah Khan <skhan@linuxfoundation.org>,
	David Matlack <dmatlack@google.com>,
	Jean-Philippe Brucker <jean-philippe@linaro.org>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>,
	Nicolin Chen <nicolinc@nvidia.com>,
	Pasha Tatashin <pasha.tatashin@soleen.com>,
	patches@lists.linux.dev, Pranjal Shrivastava <praan@google.com>,
	Samiullah Khawaja <skhawaja@google.com>,
	Mostafa Saleh <smostafa@google.com>,
	stable@vger.kernel.org,
	Vijayanand Jitta <vijayanand.jitta@oss.qualcomm.com>
Subject: Re: [PATCH v6 1/9] iommu/arm-smmu-v3: Handle ARM erratum for CONT under invalidation with SVA
Date: Thu, 17 Sep 2026 10:47:53 -0300	[thread overview]
Message-ID: <20260917134753.GD3968357@nvidia.com> (raw)
In-Reply-To: <aqvuyse0hmNCGJqt@willie-the-truck>

On Thu, Sep 17, 2026 at 02:44:42PM +0100, Will Deacon wrote:

> If we can do that without churning the driver (looks like we can), then
> it's probably worth it, but I wouldn't be keen on churning existing code
> for things like this.

Okay, I will churn this series then..

Jason

  reply	other threads:[~2026-09-17 13:48 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-17  0:27 [PATCH v6 0/9] Organize the SMMUv3 invalidation flow so iommupt can use it Jason Gunthorpe
2026-09-17  0:27 ` [PATCH v6 1/9] iommu/arm-smmu-v3: Handle ARM erratum for CONT under invalidation with SVA Jason Gunthorpe
2026-09-17  9:24   ` Mark Rutland
2026-09-17 13:16     ` Jason Gunthorpe
2026-09-17 13:44       ` Will Deacon
2026-09-17 13:47         ` Jason Gunthorpe [this message]
2026-09-17 13:56           ` Mark Rutland
2026-09-17 13:52         ` Mark Rutland
2026-09-17  0:27 ` [PATCH v6 2/9] iommu/arm-smmu-v3: Pass the parameters for the invalidation in a struct Jason Gunthorpe
2026-09-17  0:27 ` [PATCH v6 3/9] iommu/arm-smmu-v3: Move pgsize out of arm_smmu_inv Jason Gunthorpe
2026-09-17  0:27 ` [PATCH v6 4/9] iommu/arm-smmu-v3: Optimize range invalidation for latency Jason Gunthorpe
2026-09-17  0:27 ` [PATCH v6 5/9] iommu/arm-smmu-v3: Keep track in the arm_smmu_invs if RIL is used Jason Gunthorpe
2026-09-17  0:27 ` [PATCH v6 6/9] iommu/arm-smmu-v3: Precompute the invalidation commands Jason Gunthorpe
2026-09-17  0:27 ` [PATCH v6 7/9] iommu/arm-smmu-v3: Populate the tlbi at the top of the call chain Jason Gunthorpe
2026-09-17  0:27 ` [PATCH v6 8/9] iommu/arm-smmu-v3: Change how the tlbi describes the invalidation Jason Gunthorpe
2026-09-17  0:27 ` [PATCH v6 9/9] iommu/arm-smmu-v3: Support the DS expansion of RIL's SCALE Jason Gunthorpe
2026-09-17  2:43 ` [PATCH v6 0/9] Organize the SMMUv3 invalidation flow so iommupt can use it Nicolin Chen

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