From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C2BB1C982D0 for ; Thu, 17 Sep 2026 22:19:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To: Content-Transfer-Encoding:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ID0yyjs86uvWzjzpkXQAyqsj+E11ye93NtAKSRfhkjc=; b=Nl0ZxyJg/lmiVy4OKMO9bbjpfA nUDrwJBvux63eVi0GBr+ukQo/7Yg1IS1vFSpR4GZiuoYNGRSX4QfQofyfUcJSot2TLQfUqwUQQMbe XBSZu1pUgWTimpNaQhFwnfU+QYDPBY74ox83muPwf5184oPpdaZk2NOPCasGxyI9kbv8hBUeLM2nM ycuRIP1albHDENeAkUOlDrLHs9YIIV4Yu3KPrx4BnnFKgF4ZSSocY5t0twO2cmISKShpWYR7EPdVr ljUAj2Hwr5OjQ+IlbnpMJrxSI1yZtrOeMAfq8CwIYEbzB7vAr9v9ScaF7PPtxrP1P+Ij+lr9LAc/P US993q1g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1x7KRa-0000000CdKY-0K4n; Thu, 17 Sep 2026 22:19:02 +0000 Received: from tor.source.kernel.org ([2600:3c04:e001:324:0:1991:8:25]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1x7KRY-0000000CdKP-1cy2; Thu, 17 Sep 2026 22:19:00 +0000 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by tor.source.kernel.org (Postfix) with ESMTP id 8A9FF600AA; Thu, 17 Sep 2026 22:18:59 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0E8891F000FF; Thu, 17 Sep 2026 22:18:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1789683539; bh=ID0yyjs86uvWzjzpkXQAyqsj+E11ye93NtAKSRfhkjc=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=UVVHO9Hw1kTiBcefgMiGB+m9wBlu3SPKUKP4+vaWxfsfXBnK9asXgEspqpWOBw/LV 7c7Kxzh58w5eQkaVg8/Rjt5AmakFIBZVq650Qio+IRVcuj4+bu6rpMv2lr5Jj+Bxw4 WL0eVk5oBtjLHUZ/8ShMyrmTrbjQu/Yc8fyut9f/g/AaviXxMJnCAUBgdOIU5bAVbO VsRl97IVrQapzsxS2cq1WO/yz9Ls8TM714nB5gKShVs+WpUS21DQIVGVBRrLOpWZ3T NSiX2hG2VEkpTKtQJLNAeVHvb2mjSgL5JDnE3+UVz4oZ1w1ydeeayHV9RXX3seJXFi 05tQcqStFmw+Q== Date: Thu, 17 Sep 2026 17:18:57 -0500 From: Rob Herring To: Alexey Charkov Cc: Srinivas Kandagatla , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Michael Walle , Miquel Raynal , Finley Xiao , Greg Kroah-Hartman , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org Subject: Re: [PATCH v2 0/4] nvmem: Derive Rockchip MAC addresses from the OTP CPU ID Message-ID: <20260917221857.GA4056431-robh@kernel.org> References: <20260902-rk3576-otp-cpuid-mac-v2-0-e4b7fe2ab13f@flipper.net> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Sep 10, 2026 at 06:48:33PM +0400, Alexey Charkov wrote: > On Wed, Sep 2, 2026 at 5:08 PM Alexey Charkov wrote: > > > > Rockchip SoCs are shipped with a unique CPU ID in their internal OTP > > memory, and Rockchip bootloaders use it to give boards which have no > > dedicated storage for a MAC address a stable one anyway: they hash the CPU > > ID and patch the resulting addresses into the device tree they hand over. > > > > Kernels started without that fixup, e.g. straight from the SPL in Falcon > > mode or by any other loader which does not implement Rockchip's derivation, > > fall back to random MAC addresses which change on every boot. > > > > Formalize the derivation in the DT binding and add a Linux kernel driver > > implementing it, so that a Linux image can use the same stable addresses > > regardless of the boot flow. > > > > Only RK3576 is wired up here, that being the SoC I can test on. Other > > Rockchip SoCs keep the same CPU ID at a different OTP offset - 0x7 rather > > than 0xa on RK3588, for instance - which makes supporting them a two-line > > addition to the driver's match table plus the layout node. > > > > Patch 1 is a prerequisite fix. The OTP hardware has its own internal state > > machine which only works correctly with serial access, but the current > > driver serializes nothing, which results in timeouts and/or corrupted > > reads (e.g. returning splicing a TSADC trim value into the buffer of a > > caller asking for the CPU ID, or mixing up trim values of different TSADC > > callers). Hence the Fixes: tag and Cc: stable. > > > > Cross-checked on an RK3576 board: the addresses fixed up into the FDT by > > U-Boot match the ones derived by the new driver, and the driver correctly > > assigns them to the network interfaces when the kernel is booted without > > U-Boot proper at all (via Falcon mode). > > > > Sashiko also rightly pointed out a use-after-free in the nvmem core when > > a layout driver is unloaded leaving its sysfs nodes and the postprocessor > > function pointer dangling. This is fixed separately in [1]. > > > > [1] https://lore.kernel.org/all/20260902-nvmem-layout-unreg-v1-1-2d16bebeb518@flipper.net/ > > > > Signed-off-by: Alexey Charkov > > --- > > Changes in v2: > > - Switched from a scope-based guard to explicit lock/unlock calls in the > > OTP driver to avoid mixing styles in a function using goto error > > handling (Sashiko) > > - Link to v1: https://patch.msgid.link/20260901-rk3576-otp-cpuid-mac-v1-0-ea9135270fc2@flipper.net > > > > --- > > Alexey Charkov (4): > > nvmem: rockchip-otp: Serialize reads > > Incidentally, patch 1 of this series also fixes CPU thermal throttling > on my RK3576 device: apparently, the mis-read OTP-programmed thermal > trim values broke the thermal governor logic, which now works > correctly with properly serialized OTP reads. So it would be great to > have these merged. It would be great to have the sashiko comments analyzed and replied to as well if you would like this to be reviewed. Rob From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 50F9FC88E72 for ; Thu, 17 Sep 2026 22:19:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=E5xf1TDNaNxfFo1MOxvOXFuNJGWRL1FTZ+/ImMNl0uk=; b=q85aKGCjRUcOzv mQbYxwy2h9A1utP80zEqx1AtHJiHH2JTHntzqkJNVttmId8iotdZspWVOSpMFKzCRCUDyS2855VUm p0sLpfIA8GsHRDE0tquns+mlv1Na4wzPB6+/s3i4juQxf7MzNbDLLSqY6aRNX7vPPhmFzaSCcfTC7 yMeYla2/oL5KIO56LhFbqtTGB73ltS2gKI20EJtqUI2H5ytJGoMkem5dM3omNl8uZSKcmG5VcfHJ8 QMQuaJWnfk3W4F3r9kkhCudVNPA72vQfexeXVjIi1aJD8/y30bptfRAKHMGVtP7DcFOHJYS7z5Jyx tkt+caZUAWe6MWm2lnTA==; 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charset="utf-8" Content-Transfer-Encoding: base64 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org T24gVGh1LCBTZXAgMTAsIDIwMjYgYXQgMDY6NDg6MzNQTSArMDQwMCwgQWxleGV5IENoYXJrb3Yg d3JvdGU6Cj4gT24gV2VkLCBTZXAgMiwgMjAyNiBhdCA1OjA44oCvUE0gQWxleGV5IENoYXJrb3Yg PGFsY2hhcmtAZmxpcHBlci5uZXQ+IHdyb3RlOgo+ID4KPiA+IFJvY2tjaGlwIFNvQ3MgYXJlIHNo aXBwZWQgd2l0aCBhIHVuaXF1ZSBDUFUgSUQgaW4gdGhlaXIgaW50ZXJuYWwgT1RQCj4gPiBtZW1v cnksIGFuZCBSb2NrY2hpcCBib290bG9hZGVycyB1c2UgaXQgdG8gZ2l2ZSBib2FyZHMgd2hpY2gg aGF2ZSBubwo+ID4gZGVkaWNhdGVkIHN0b3JhZ2UgZm9yIGEgTUFDIGFkZHJlc3MgYSBzdGFibGUg b25lIGFueXdheTogdGhleSBoYXNoIHRoZSBDUFUKPiA+IElEIGFuZCBwYXRjaCB0aGUgcmVzdWx0 aW5nIGFkZHJlc3NlcyBpbnRvIHRoZSBkZXZpY2UgdHJlZSB0aGV5IGhhbmQgb3Zlci4KPiA+Cj4g PiBLZXJuZWxzIHN0YXJ0ZWQgd2l0aG91dCB0aGF0IGZpeHVwLCBlLmcuIHN0cmFpZ2h0IGZyb20g dGhlIFNQTCBpbiBGYWxjb24KPiA+IG1vZGUgb3IgYnkgYW55IG90aGVyIGxvYWRlciB3aGljaCBk b2VzIG5vdCBpbXBsZW1lbnQgUm9ja2NoaXAncyBkZXJpdmF0aW9uLAo+ID4gZmFsbCBiYWNrIHRv IHJhbmRvbSBNQUMgYWRkcmVzc2VzIHdoaWNoIGNoYW5nZSBvbiBldmVyeSBib290Lgo+ID4KPiA+ IEZvcm1hbGl6ZSB0aGUgZGVyaXZhdGlvbiBpbiB0aGUgRFQgYmluZGluZyBhbmQgYWRkIGEgTGlu dXgga2VybmVsIGRyaXZlcgo+ID4gaW1wbGVtZW50aW5nIGl0LCBzbyB0aGF0IGEgTGludXggaW1h Z2UgY2FuIHVzZSB0aGUgc2FtZSBzdGFibGUgYWRkcmVzc2VzCj4gPiByZWdhcmRsZXNzIG9mIHRo ZSBib290IGZsb3cuCj4gPgo+ID4gT25seSBSSzM1NzYgaXMgd2lyZWQgdXAgaGVyZSwgdGhhdCBi ZWluZyB0aGUgU29DIEkgY2FuIHRlc3Qgb24uIE90aGVyCj4gPiBSb2NrY2hpcCBTb0NzIGtlZXAg dGhlIHNhbWUgQ1BVIElEIGF0IGEgZGlmZmVyZW50IE9UUCBvZmZzZXQgLSAweDcgcmF0aGVyCj4g PiB0aGFuIDB4YSBvbiBSSzM1ODgsIGZvciBpbnN0YW5jZSAtIHdoaWNoIG1ha2VzIHN1cHBvcnRp bmcgdGhlbSBhIHR3by1saW5lCj4gPiBhZGRpdGlvbiB0byB0aGUgZHJpdmVyJ3MgbWF0Y2ggdGFi bGUgcGx1cyB0aGUgbGF5b3V0IG5vZGUuCj4gPgo+ID4gUGF0Y2ggMSBpcyBhIHByZXJlcXVpc2l0 ZSBmaXguIFRoZSBPVFAgaGFyZHdhcmUgaGFzIGl0cyBvd24gaW50ZXJuYWwgc3RhdGUKPiA+IG1h Y2hpbmUgd2hpY2ggb25seSB3b3JrcyBjb3JyZWN0bHkgd2l0aCBzZXJpYWwgYWNjZXNzLCBidXQg dGhlIGN1cnJlbnQKPiA+IGRyaXZlciBzZXJpYWxpemVzIG5vdGhpbmcsIHdoaWNoIHJlc3VsdHMg aW4gdGltZW91dHMgYW5kL29yIGNvcnJ1cHRlZAo+ID4gcmVhZHMgKGUuZy4gcmV0dXJuaW5nIHNw bGljaW5nIGEgVFNBREMgdHJpbSB2YWx1ZSBpbnRvIHRoZSBidWZmZXIgb2YgYQo+ID4gY2FsbGVy IGFza2luZyBmb3IgdGhlIENQVSBJRCwgb3IgbWl4aW5nIHVwIHRyaW0gdmFsdWVzIG9mIGRpZmZl cmVudCBUU0FEQwo+ID4gY2FsbGVycykuIEhlbmNlIHRoZSBGaXhlczogdGFnIGFuZCBDYzogc3Rh YmxlLgo+ID4KPiA+IENyb3NzLWNoZWNrZWQgb24gYW4gUkszNTc2IGJvYXJkOiB0aGUgYWRkcmVz c2VzIGZpeGVkIHVwIGludG8gdGhlIEZEVCBieQo+ID4gVS1Cb290IG1hdGNoIHRoZSBvbmVzIGRl cml2ZWQgYnkgdGhlIG5ldyBkcml2ZXIsIGFuZCB0aGUgZHJpdmVyIGNvcnJlY3RseQo+ID4gYXNz aWducyB0aGVtIHRvIHRoZSBuZXR3b3JrIGludGVyZmFjZXMgd2hlbiB0aGUga2VybmVsIGlzIGJv b3RlZCB3aXRob3V0Cj4gPiBVLUJvb3QgcHJvcGVyIGF0IGFsbCAodmlhIEZhbGNvbiBtb2RlKS4K PiA+Cj4gPiBTYXNoaWtvIGFsc28gcmlnaHRseSBwb2ludGVkIG91dCBhIHVzZS1hZnRlci1mcmVl IGluIHRoZSBudm1lbSBjb3JlIHdoZW4KPiA+IGEgbGF5b3V0IGRyaXZlciBpcyB1bmxvYWRlZCBs ZWF2aW5nIGl0cyBzeXNmcyBub2RlcyBhbmQgdGhlIHBvc3Rwcm9jZXNzb3IKPiA+IGZ1bmN0aW9u IHBvaW50ZXIgZGFuZ2xpbmcuIFRoaXMgaXMgZml4ZWQgc2VwYXJhdGVseSBpbiBbMV0uCj4gPgo+ ID4gWzFdIGh0dHBzOi8vbG9yZS5rZXJuZWwub3JnL2FsbC8yMDI2MDkwMi1udm1lbS1sYXlvdXQt dW5yZWctdjEtMS0yZDE2YmViZWI1MThAZmxpcHBlci5uZXQvCj4gPgo+ID4gU2lnbmVkLW9mZi1i eTogQWxleGV5IENoYXJrb3YgPGFsY2hhcmtAZmxpcHBlci5uZXQ+Cj4gPiAtLS0KPiA+IENoYW5n ZXMgaW4gdjI6Cj4gPiAtIFN3aXRjaGVkIGZyb20gYSBzY29wZS1iYXNlZCBndWFyZCB0byBleHBs aWNpdCBsb2NrL3VubG9jayBjYWxscyBpbiB0aGUKPiA+ICAgT1RQIGRyaXZlciB0byBhdm9pZCBt aXhpbmcgc3R5bGVzIGluIGEgZnVuY3Rpb24gdXNpbmcgZ290byBlcnJvcgo+ID4gICBoYW5kbGlu ZyAoU2FzaGlrbykKPiA+IC0gTGluayB0byB2MTogaHR0cHM6Ly9wYXRjaC5tc2dpZC5saW5rLzIw MjYwOTAxLXJrMzU3Ni1vdHAtY3B1aWQtbWFjLXYxLTAtZWE5MTM1MjcwZmMyQGZsaXBwZXIubmV0 Cj4gPgo+ID4gLS0tCj4gPiBBbGV4ZXkgQ2hhcmtvdiAoNCk6Cj4gPiAgICAgICBudm1lbTogcm9j a2NoaXAtb3RwOiBTZXJpYWxpemUgcmVhZHMKPiAKPiBJbmNpZGVudGFsbHksIHBhdGNoIDEgb2Yg dGhpcyBzZXJpZXMgYWxzbyBmaXhlcyBDUFUgdGhlcm1hbCB0aHJvdHRsaW5nCj4gb24gbXkgUksz NTc2IGRldmljZTogYXBwYXJlbnRseSwgdGhlIG1pcy1yZWFkIE9UUC1wcm9ncmFtbWVkIHRoZXJt YWwKPiB0cmltIHZhbHVlcyBicm9rZSB0aGUgdGhlcm1hbCBnb3Zlcm5vciBsb2dpYywgd2hpY2gg bm93IHdvcmtzCj4gY29ycmVjdGx5IHdpdGggcHJvcGVybHkgc2VyaWFsaXplZCBPVFAgcmVhZHMu IFNvIGl0IHdvdWxkIGJlIGdyZWF0IHRvCj4gaGF2ZSB0aGVzZSBtZXJnZWQuCgpJdCB3b3VsZCBi ZSBncmVhdCB0byBoYXZlIHRoZSBzYXNoaWtvIGNvbW1lbnRzIGFuYWx5emVkIGFuZCByZXBsaWVk IHRvIAphcyB3ZWxsIGlmIHlvdSB3b3VsZCBsaWtlIHRoaXMgdG8gYmUgcmV2aWV3ZWQuCgpSb2IK Cl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkxpbnV4LXJv Y2tjaGlwIG1haWxpbmcgbGlzdApMaW51eC1yb2NrY2hpcEBsaXN0cy5pbmZyYWRlYWQub3JnCmh0 dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtcm9ja2NoaXAK