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Fri, 18 Sep 2026 06:53:52 +0000 From: Kane Chen To: =?iso-8859-1?Q?C=E9dric_Le_Goater?= , Peter Maydell , Steven Lee , Troy Lee , Jamin Lin , Andrew Jeffery , Joel Stanley , "open list:ASPEED BMCs" , "open list:All patches CC here" CC: Troy Lee , Kane Chen Subject: [PATCH v2 3/3] hw/misc/aspeed_sbc: Derive secure boot state from OTP config Thread-Topic: [PATCH v2 3/3] hw/misc/aspeed_sbc: Derive secure boot state from OTP config Thread-Index: AQHdRzp2QR099gXF2UW86apyi1Ym2g== Date: Fri, 18 Sep 2026 06:53:51 +0000 Message-ID: <20260918065347.3713868-4-kane_chen@aspeedtech.com> References: <20260918065347.3713868-1-kane_chen@aspeedtech.com> In-Reply-To: <20260918065347.3713868-1-kane_chen@aspeedtech.com> Accept-Language: zh-TW, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=aspeedtech.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: SEZPR06MB7619:EE_|SEZPR06MB8814:EE_ x-ms-office365-filtering-correlation-id: bbbc2445-518f-4b55-498e-08df15519964 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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envelope-from=kane_chen@aspeedtech.com; helo=TYDPR03CU002.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The secure boot state is currently controlled by the=0A= "signing-settings" machine property instead of the OTP configuration.=0A= =0A= Derive SECURE_BOOT_EN and R_QSR from the OTP configuration when the=0A= registers are read.=0A= =0A= Remove the "signing-settings" property as the secure boot state is now=0A= derived from OTP.=0A= =0A= Signed-off-by: Kane-Chen-AS =0A= ---=0A= include/hw/misc/aspeed_sbc.h | 2 --=0A= hw/misc/aspeed_sbc.c | 22 +++++++++++++---------=0A= 2 files changed, 13 insertions(+), 11 deletions(-)=0A= =0A= diff --git a/include/hw/misc/aspeed_sbc.h b/include/hw/misc/aspeed_sbc.h=0A= index b210ffb8aa..7f3fa7062f 100644=0A= --- a/include/hw/misc/aspeed_sbc.h=0A= +++ b/include/hw/misc/aspeed_sbc.h=0A= @@ -32,8 +32,6 @@ OBJECT_DECLARE_TYPE(AspeedSBCState, AspeedSBCClass, ASPEE= D_SBC)=0A= struct AspeedSBCState {=0A= SysBusDevice parent;=0A= =0A= - uint32_t signing_settings;=0A= -=0A= MemoryRegion iomem;=0A= =0A= uint32_t regs[ASPEED_SBC_NR_REGS];=0A= diff --git a/hw/misc/aspeed_sbc.c b/hw/misc/aspeed_sbc.c=0A= index 6cec9ad3da..ad4c2b4b1d 100644=0A= --- a/hw/misc/aspeed_sbc.c=0A= +++ b/hw/misc/aspeed_sbc.c=0A= @@ -79,6 +79,8 @@=0A= #define MODE_REGISTER_A (0x3000)=0A= #define MODE_REGISTER_B (0x5000)=0A= =0A= +static bool aspeed_sbc_otp_read(AspeedSBCState *s, uint32_t otp_addr);=0A= +=0A= static uint64_t aspeed_sbc_read(void *opaque, hwaddr addr, unsigned int si= ze)=0A= {=0A= AspeedSBCState *s =3D ASPEED_SBC(opaque);=0A= @@ -102,8 +104,16 @@ static uint64_t aspeed_sbc_read(void *opaque, hwaddr a= ddr, unsigned int size)=0A= val &=3D ~ABR_EN;=0A= }=0A= =0A= + if (aspeed_otp_read_config(&s->otp, 0) & BIT(1)) {=0A= + val |=3D SECURE_BOOT_EN;=0A= + } else {=0A= + val &=3D ~SECURE_BOOT_EN;=0A= + }=0A= +=0A= return val;=0A= }=0A= + case R_QSR:=0A= + return aspeed_otp_read_config(&s->otp, 0);=0A= default:=0A= return s->regs[addr];=0A= }=0A= @@ -406,16 +416,11 @@ static void aspeed_sbc_reset_hold(Object *obj, ResetT= ype type)=0A= memset(s->regs, 0, sizeof(s->regs));=0A= =0A= /*=0A= - * ABR_EN is derived from OTP on every read, see aspeed_sbc_read().=0A= - * Set secure boot enabled with RSA4096_SHA256.=0A= + * ABR_EN and SECURE_BOOT_EN are derived from OTP on every read, see= =0A= + * aspeed_sbc_read(), since the SBC status register is just a=0A= + * reflection of the OTP fuse state.=0A= */=0A= s->regs[R_STATUS] =3D OTP_IDLE | OTP_MEM_IDLE;=0A= -=0A= - if (s->signing_settings) {=0A= - s->regs[R_STATUS] &=3D SECURE_BOOT_EN;=0A= - }=0A= -=0A= - s->regs[R_QSR] =3D s->signing_settings;=0A= }=0A= =0A= static void aspeed_sbc_instance_init(Object *obj)=0A= @@ -468,7 +473,6 @@ static const VMStateDescription vmstate_aspeed_sbc =3D = {=0A= };=0A= =0A= static const Property aspeed_sbc_properties[] =3D {=0A= - DEFINE_PROP_UINT32("signing-settings", AspeedSBCState, signing_setting= s, 0),=0A= DEFINE_PROP_LINK("sram", AspeedSBCState, sram,=0A= TYPE_MEMORY_REGION, MemoryRegion *),=0A= };=0A= -- =0A= 2.43.0=0A=