[PATCH RFC 04/11] rockchip: cru: improve and simplify reset cause handling

[Massimo Pegorer <massimo.pegorer+oss@gmail.com>]

Split reset cause code into two functions: the first just returns an
enum identifier of the cause, to be used wherever needed (such as in
roc-pc-rk3399 board level code to detect a POR); the second returns
the reset cause string description used just by print_cpuinfo() and
therefore static and bound to CONFIG_DISPAY_CPUINFO.

Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
---
 arch/arm/include/asm/arch-rockchip/clock.h  | 11 +++++++-
 arch/arm/mach-rockchip/cpu-info.c           | 41 ++++++++++++++++++-----------
 board/firefly/roc-pc-rk3399/roc-pc-rk3399.c |  2 +-
 3 files changed, 37 insertions(+), 17 deletions(-)

diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index 4bedf1a0294..fa346b68a5e 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -194,7 +194,16 @@ void rk3288_clk_configure_cpu(struct rockchip_cru *cru, struct rk3288_grf *grf);
 
 int rockchip_get_clk(struct udevice **devp);
 
-char *get_reset_cause(void);
+enum rockchip_rst_cause {
+	RST_CAUSE_UNAVAILABLE,
+	RST_CAUSE_POR,
+	RST_CAUSE_REG,
+	RST_CAUSE_THERMAL,
+	RST_CAUSE_WDOG,
+	RST_CAUSE_UNKNOWN,
+};
+
+enum rockchip_rst_cause rockchip_get_reset_cause(void);
 
 /*
  * rockchip_reset_bind() - Bind soft reset device as child of clock device
diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c
index 7f20f7aa667..2ec96a20c3d 100644
--- a/arch/arm/mach-rockchip/cpu-info.c
+++ b/arch/arm/mach-rockchip/cpu-info.c
@@ -31,41 +31,52 @@ enum {
 	SND_GLB_WDT_RST_ST	= BIT(5),
 };
 
-char *get_reset_cause(void)
+enum rockchip_rst_cause rockchip_get_reset_cause(void)
 {
 	struct rockchip_cru *cru = rockchip_get_cru();
-	char *cause = NULL;
 
 	if (IS_ERR(cru))
-		return cause;
+		return RST_CAUSE_UNAVAILABLE;
 
 	switch (cru->glb_rst_st) {
 	case GLB_POR_RST:
-		cause = "POR";
-		break;
+		return RST_CAUSE_POR;
 	case FST_GLB_RST_ST:
 	case SND_GLB_RST_ST:
-		cause = "RST";
-		break;
+		return RST_CAUSE_REG;
 	case FST_GLB_TSADC_RST_ST:
 	case SND_GLB_TSADC_RST_ST:
-		cause = "THERMAL";
-		break;
+		return RST_CAUSE_THERMAL;
 	case FST_GLB_WDT_RST_ST:
 	case SND_GLB_WDT_RST_ST:
-		cause = "WDOG";
-		break;
-	default:
-		cause = "unknown reset";
+		return RST_CAUSE_WDOG;
 	}
 
-	return cause;
+	return RST_CAUSE_UNKNOWN;
 }
 
 #if IS_ENABLED(CONFIG_DISPLAY_CPUINFO)
+static const char *get_reset_cause(void)
+{
+	switch (rockchip_get_reset_cause()) {
+	case RST_CAUSE_UNAVAILABLE:
+		return NULL;
+	case RST_CAUSE_POR:
+		return "POR";
+	case RST_CAUSE_REG:
+		return "RST";
+	case RST_CAUSE_THERMAL:
+		return "THERMAL";
+	case RST_CAUSE_WDOG:
+		return "WDOG";
+	default:
+		return "unknown reset";
+	}
+}
+
 int print_cpuinfo(void)
 {
-	char *cause = get_reset_cause();
+	const char *cause = get_reset_cause();
 
 	printf("SoC: Rockchip %s\n", CONFIG_SYS_SOC);
 	printf("Reset cause: %s\n", cause);
diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
index 713d3eb2eb9..7b8f658f87f 100644
--- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
+++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
@@ -50,7 +50,7 @@ void led_setup(void)
 			press_pwr_key = true;
 	}
 
-	if (press_pwr_key && !strcmp(get_reset_cause(), "POR")) {
+	if (press_pwr_key && rockchip_get_reset_cause() == RST_CAUSE_POR) {
 		spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1);
 
 		spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5),

-- 
2.34.1