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Sun, 20 Sep 2026 07:16:29 -0700 (PDT) Sender: Massimo Pegorer From: Massimo Pegorer Date: Sun, 20 Sep 2026 16:15:51 +0200 Subject: [PATCH RFC 07/11] arm: rockchip: print SoC detailed info with DISPLAY_CPUINFO MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260920-reset-v1-7-42820216369f@gmail.com> References: <20260920-reset-v1-0-42820216369f@gmail.com> In-Reply-To: <20260920-reset-v1-0-42820216369f@gmail.com> To: Simon Glass , Quentin Schulz , u-boot@lists.u-boot-project.org Cc: Tom Rini , Ilias Apalodimas , Kever Yang , Lukasz Majewski , Anatolij Gustschin , Heiko Schocher , Marek Vasut , Svyatoslav Ryhel , Peter Robinson , Levin Du , Suniel Mahesh , Alexey Charkov , Fabio Estevam , Jonas Karlman , Chris Morgan , Coia Prant , Frank Wunderlich , Andy Yan , Liangbin Lian , Joseph Chen , Tianling Shen , Klaus Goger , Heiko Stuebner , Jacobe Zang , Jiehui He , John Clark , Sebastian Kropatsch , Jagan Teki , Ilya Katsnelson , Niu Zhihong , Nicolas Frattaroli , Tom Fitzhenry , Akash Gajjar , Maxim Moskalets , FUKAUMI Naoki , Eugen Hristev , Jianfeng Liu , Elon Zhang , Joshua Riek , Martin Herren , Torsten Duwe , Massimo Pegorer X-Mailer: b4 0.15.2 X-Mailman-Approved-At: Sun, 20 Sep 2026 15:49:13 +0000 X-BeenThere: u-boot@lists.u-boot-project.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.u-boot-project.org Several Rockchip SoCs have a specific implementation of checkboard() that prints a string with more SoC info than CONFIG_SYS_SOC: in these cases, make print_cpuinfo() call it to provide all available SoC information, and only if the function fails print CONFIG_SYS_SOC as a fallback. Unfortunately, checkboard() is a special function used to override a weak dummy implementation and is wrapped into INITCALL macro when the DISPLAY_BOARDINFO(_LATE) config option is selected: changing it to return non-zero in case of failure is not an option, it will hang. Therefore, rename checkboard() Rockchip SoC-specific implementations to rockchip_print_soc() and change them to return zero on success and -ve on error. On the other hand provide a common checkboard() implementation, at Rockchip mach level, that wraps them (or the dummy weak one) but always returns zero. Moreover, if DISPLAY_CPUINFO is selected, make checkboard() not to call rockchip_print_soc(): being SoC info already been printed by print_cpuinfo() it seems redundant to print these info again due to DISPLAY_BOARDINFO(_LATE) being selected too. Signed-off-by: Massimo Pegorer --- arch/arm/mach-rockchip/cpu-info.c | 18 +++++++++++++++++- arch/arm/mach-rockchip/px30/px30.c | 12 ++++++------ arch/arm/mach-rockchip/rk3308/rk3308.c | 2 +- arch/arm/mach-rockchip/rk3506/rk3506.c | 10 +++++----- arch/arm/mach-rockchip/rk3528/rk3528.c | 10 +++++----- arch/arm/mach-rockchip/rk3568/rk3568.c | 12 ++++++------ arch/arm/mach-rockchip/rk3576/rk3576.c | 10 +++++----- arch/arm/mach-rockchip/rk3588/rk3588.c | 10 +++++----- 8 files changed, 50 insertions(+), 34 deletions(-) diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c index b6e3d9ff964..823a2c6b89d 100644 --- a/arch/arm/mach-rockchip/cpu-info.c +++ b/arch/arm/mach-rockchip/cpu-info.c @@ -10,6 +10,20 @@ #include #include +__weak int rockchip_print_soc(void) +{ + return -ENOTSUPP; +} + +int checkboard(void) +{ + /* Print SOC only if not already printed by CPUINFO */ + if (!IS_ENABLED(CONFIG_DISPLAY_CPUINFO)) + rockchip_print_soc(); + + return 0; +} + __weak enum rockchip_rst_cause rockchip_get_reset_cause(void) { return RST_CAUSE_UNAVAILABLE; @@ -38,7 +52,9 @@ int print_cpuinfo(void) { const char *cause = get_reset_cause(); - printf("SoC: Rockchip %s\n", CONFIG_SYS_SOC); + if (rockchip_print_soc()) + printf("SoC: Rockchip %s\n", CONFIG_SYS_SOC); + printf("Reset cause: %s\n", cause); /** diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c index 5a5c119328f..83b430b0ea6 100644 --- a/arch/arm/mach-rockchip/px30/px30.c +++ b/arch/arm/mach-rockchip/px30/px30.c @@ -453,7 +453,7 @@ void board_debug_uart_init(void) #define DDR_GRF_BASE_ADDR 0xff630000 #define DDR_GRF_CON(n) (0 + (n) * 4) -int checkboard(void) +int rockchip_print_soc(void) { struct udevice *dev; u8 specification; @@ -461,32 +461,32 @@ int checkboard(void) int ret; if (!IS_ENABLED(CONFIG_ROCKCHIP_OTP) || !CONFIG_IS_ENABLED(MISC)) - return 0; + return -ENOTSUPP; ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(rockchip_otp), &dev); if (ret) { log_debug("Could not find otp device, ret=%d\n", ret); - return 0; + return ret; } /* base SoC: 0x26334b52 for RK3326; 0x30335850 for PX30 */ ret = misc_read(dev, 0, &base_soc, 4); if (ret < 0) { log_debug("Could not read specification, ret=%d\n", ret); - return 0; + return ret; } if (base_soc != 0x26334b52 && base_soc != 0x30335850) { log_debug("Could not identify SoC, got 0x%04x in OTP\n", base_soc); - return 0; + return -EINVAL; } /* SoC variant: 0x21 for PX30/PX30S/RK3326/RK3326S; 0x2b for PX30K */ ret = misc_read(dev, PX30_OTP_SPECIFICATION_OFFSET, &specification, 1); if (ret < 0) { log_debug("Could not read specification, ret=%d\n", ret); - return 0; + return ret; } if (specification == 0x2b) { diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c index 6916f1a2444..de56672cc0e 100644 --- a/arch/arm/mach-rockchip/rk3308/rk3308.c +++ b/arch/arm/mach-rockchip/rk3308/rk3308.c @@ -152,7 +152,7 @@ int arch_cpu_init(void) #define RK3308_GRF_CHIP_ID 0xFF000800 -int checkboard(void) +int rockchip_print_soc(void) { u32 chip_id = readl(RK3308_GRF_CHIP_ID); diff --git a/arch/arm/mach-rockchip/rk3506/rk3506.c b/arch/arm/mach-rockchip/rk3506/rk3506.c index 2ed1dcc128e..141a9a9ab0b 100644 --- a/arch/arm/mach-rockchip/rk3506/rk3506.c +++ b/arch/arm/mach-rockchip/rk3506/rk3506.c @@ -83,7 +83,7 @@ void rockchip_stimer_init(void) #define RK3506_OTP_CPU_CODE_OFFSET 0x02 #define RK3506_OTP_SPECIFICATION_OFFSET 0x08 -int checkboard(void) +int rockchip_print_soc(void) { u8 cpu_code[2], specification; struct udevice *dev; @@ -91,27 +91,27 @@ int checkboard(void) int ret; if (!IS_ENABLED(CONFIG_ROCKCHIP_OTP) || !CONFIG_IS_ENABLED(MISC)) - return 0; + return -ENOTSUPP; ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(rockchip_otp), &dev); if (ret) { log_debug("Could not find otp device, ret=%d\n", ret); - return 0; + return ret; } /* cpu-code: SoC model, e.g. 0x35 0x06 */ ret = misc_read(dev, RK3506_OTP_CPU_CODE_OFFSET, cpu_code, 2); if (ret < 0) { log_debug("Could not read cpu-code, ret=%d\n", ret); - return 0; + return ret; } /* specification: SoC variant, e.g. 0xA for RK3506J */ ret = misc_read(dev, RK3506_OTP_SPECIFICATION_OFFSET, &specification, 1); if (ret < 0) { log_debug("Could not read specification, ret=%d\n", ret); - return 0; + return ret; } specification &= 0x1f; diff --git a/arch/arm/mach-rockchip/rk3528/rk3528.c b/arch/arm/mach-rockchip/rk3528/rk3528.c index a39cb8be9a1..87b0040074b 100644 --- a/arch/arm/mach-rockchip/rk3528/rk3528.c +++ b/arch/arm/mach-rockchip/rk3528/rk3528.c @@ -104,7 +104,7 @@ void rockchip_stimer_init(void) #define RK3528_OTP_CPU_CODE_OFFSET 0x02 #define RK3528_OTP_CPU_CHIP_TYPE_OFFSET 0x28 -int checkboard(void) +int rockchip_print_soc(void) { u8 cpu_code[2], chip_type; struct udevice *dev; @@ -112,26 +112,26 @@ int checkboard(void) int ret; if (!IS_ENABLED(CONFIG_ROCKCHIP_OTP) || !CONFIG_IS_ENABLED(MISC)) - return 0; + return -ENOTSUPP; ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(rockchip_otp), &dev); if (ret) { log_debug("Could not find otp device, ret=%d\n", ret); - return 0; + return ret; } /* cpu-code: SoC model, e.g. 0x35 0x28 */ ret = misc_read(dev, RK3528_OTP_CPU_CODE_OFFSET, cpu_code, 2); if (ret < 0) { log_debug("Could not read cpu-code, ret=%d\n", ret); - return 0; + return ret; } ret = misc_read(dev, RK3528_OTP_CPU_CHIP_TYPE_OFFSET, &chip_type, 1); if (ret < 0) { log_debug("Could not read chip type, ret=%d\n", ret); - return 0; + return ret; } suffix[0] = chip_type != 0x1 ? 'A' : '\0'; diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c index 2b1eafee37c..c42d1982feb 100644 --- a/arch/arm/mach-rockchip/rk3568/rk3568.c +++ b/arch/arm/mach-rockchip/rk3568/rk3568.c @@ -153,7 +153,7 @@ int arch_cpu_init(void) #define RK3568_OTP_SPECIFICATION_OFFSET 0x07 #define RK3568_OTP_PERFORMANCE_OFFSET 0x22 -int checkboard(void) +int rockchip_print_soc(void) { u8 cpu_code[2], specification, package, performance; struct udevice *dev; @@ -161,27 +161,27 @@ int checkboard(void) int ret; if (!IS_ENABLED(CONFIG_ROCKCHIP_OTP) || !CONFIG_IS_ENABLED(MISC)) - return 0; + return -ENOTSUPP; ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(rockchip_otp), &dev); if (ret) { log_debug("Could not find otp device, ret=%d\n", ret); - return 0; + return ret; } /* cpu-code: SoC model, e.g. 0x35 0x66 or 0x35 0x68 */ ret = misc_read(dev, RK3568_OTP_CPU_CODE_OFFSET, cpu_code, 2); if (ret < 0) { log_debug("Could not read cpu-code, ret=%d\n", ret); - return 0; + return ret; } /* specification: SoC variant, e.g. 0x2 for RK3568B2 and 0xA for RK3568J */ ret = misc_read(dev, RK3568_OTP_SPECIFICATION_OFFSET, &specification, 1); if (ret < 0) { log_debug("Could not read specification, ret=%d\n", ret); - return 0; + return ret; } /* package: likely SoC variant revision, 0x2 for RK3568B2 */ package = specification >> 5; @@ -191,7 +191,7 @@ int checkboard(void) ret = misc_read(dev, RK3568_OTP_PERFORMANCE_OFFSET, &performance, 1); if (ret < 0) { log_debug("Could not read performance, ret=%d\n", ret); - return 0; + return ret; } if (performance & 0x0f) specification = 0x14; /* T-variant */ diff --git a/arch/arm/mach-rockchip/rk3576/rk3576.c b/arch/arm/mach-rockchip/rk3576/rk3576.c index 76119cdb1ae..80905dccf6a 100644 --- a/arch/arm/mach-rockchip/rk3576/rk3576.c +++ b/arch/arm/mach-rockchip/rk3576/rk3576.c @@ -209,7 +209,7 @@ int arch_cpu_init(void) #define RK3576_OTP_CPU_CODE_OFFSET 0x02 #define RK3576_OTP_SPECIFICATION_OFFSET 0x08 -int checkboard(void) +int rockchip_print_soc(void) { u8 cpu_code[2], specification; struct udevice *dev; @@ -217,27 +217,27 @@ int checkboard(void) int ret; if (!IS_ENABLED(CONFIG_ROCKCHIP_OTP) || !CONFIG_IS_ENABLED(MISC)) - return 0; + return -ENOTSUPP; ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(rockchip_otp), &dev); if (ret) { log_debug("Could not find otp device, ret=%d\n", ret); - return 0; + return ret; } /* cpu-code: SoC model, e.g. 0x35 0x76 */ ret = misc_read(dev, RK3576_OTP_CPU_CODE_OFFSET, cpu_code, 2); if (ret < 0) { log_debug("Could not read cpu-code, ret=%d\n", ret); - return 0; + return ret; } /* specification: SoC variant, e.g. 0xA for RK3576J */ ret = misc_read(dev, RK3576_OTP_SPECIFICATION_OFFSET, &specification, 1); if (ret < 0) { log_debug("Could not read specification, ret=%d\n", ret); - return 0; + return ret; } specification &= 0x1f; diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c index f69792670d0..e3a2198cc70 100644 --- a/arch/arm/mach-rockchip/rk3588/rk3588.c +++ b/arch/arm/mach-rockchip/rk3588/rk3588.c @@ -270,7 +270,7 @@ int rockchip_dram_init_banksize_fixup(struct bd_info *bd) #define FAIL_RKVENC0 BIT(0) #define FAIL_RKVENC1 BIT(2) -int checkboard(void) +int rockchip_print_soc(void) { u8 cpu_code[2], specification, package; struct udevice *dev; @@ -278,27 +278,27 @@ int checkboard(void) int ret; if (!IS_ENABLED(CONFIG_ROCKCHIP_OTP) || !CONFIG_IS_ENABLED(MISC)) - return 0; + return -ENOTSUPP; ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(rockchip_otp), &dev); if (ret) { log_debug("Could not find otp device, ret=%d\n", ret); - return 0; + return ret; } /* cpu-code: SoC model, e.g. 0x35 0x82 or 0x35 0x88 */ ret = misc_read(dev, RK3588_OTP_CPU_CODE_OFFSET, cpu_code, 2); if (ret < 0) { log_debug("Could not read cpu-code, ret=%d\n", ret); - return 0; + return ret; } /* specification: SoC variant, e.g. 0xA for RK3588J and 0x13 for RK3588S */ ret = misc_read(dev, RK3588_OTP_SPECIFICATION_OFFSET, &specification, 1); if (ret < 0) { log_debug("Could not read specification, ret=%d\n", ret); - return 0; + return ret; } /* package: likely SoC variant revision, 0x2 for RK3588S2 */ package = specification >> 5; -- 2.34.1