From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5E24B3DB64B; Sun, 20 Sep 2026 06:54:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789887298; cv=none; b=VTzDo9/Mb5P+QMye80cWq9TdkFmFb+QayWBmFkLa0JiqclXM9yilhwyUVjHdmouMLXUmqnpr9XPaviUCxMbjz3mugsYjBUJvXy3m0G2uYE5rVVcPetmq+bu4aIT/AMeTr5BnxyhSKYvABmAXE2x7l2udXMQFQb0Jm/vyFIqwIIM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789887298; c=relaxed/simple; bh=w2U/G87lR2fJF/QQp/d8DFlfh8db9YZUafgy8ueCiCs=; h=From:Subject:To:Cc:In-Reply-To:References:Content-Type:Date: Message-Id; b=uwjeLNv04R08TaVcJM13TvkOmHo/gld4eRstS/pyeNdDFncKIABdT3LHFXKwX3PTp7PeS7THaaiLjJ3XRRkkF/Ap1vhzejI4jHQaZDEe8VOolImOALN/na1mIAM3KLBGb2Z5qpa9px3YEsR2NomKV7oG2gqXWmbAbUjNT9XmAZ4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=QbjJltmB; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="QbjJltmB" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 99D951F000FF; Sun, 20 Sep 2026 06:54:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1789887297; bh=VdUGT7JhdnhiMe+TwqTYeXIrGneg9v/OjTMN8gRSFKk=; h=From:Subject:Reply-To:To:Cc:In-Reply-To:References:Date; b=QbjJltmBK4aVAnSnKOcbH44t9Y18cmtrEZ2qPvTwGJadaieXnlkzqAoB673ZfNNQg syjqE+4WNJDx3ndrYmIm8IFilUpg05QgJ9AzubluKrSMongRy2OXSWrlrsLXGirGRd hWDPYmlegO6KVpCUD82nSTg3+3SR1utpiSVY3T8J902m6QtoUcaZydC6YkacguuT1N kFjxTYa8hZK5gJMxDKo+1dmOb9iJbLcmH4/RWnRjMcGHald4oRrLJLiTvpSYxIyefK 9z+oQz8bUPdaw6EDO6M3ZObfZctBGijWXEZAzoJVqe9YhEiDOk8179PTtbzDl63Knd U9Md1Pvd2w18A== From: sashiko-bot@kernel.org Subject: Re: [PATCH RFC v3 06/12] phy: freescale: s32g: Add SerDes subsystem PHY Reply-To: sashiko-reviews@lists.linux.dev To: =?utf-8?b?SmFuIFBldHJvdXMgKE9TUyk=?= Cc: linux-pci@vger.kernel.org, vkoul@kernel.org, neil.armstrong@linaro.org, olteanv@gmail.com, linux-phy@lists.infradead.org, Frank.Li@kernel.org, conor+dt@kernel.org, wsa+renesas@sang-engineering.com, robh@kernel.org, imx@lists.linux.dev, devicetree@vger.kernel.org In-Reply-To: <20260919-s32g_serdes-v3-6-9d68868c1e89@oss.nxp.com> References: <20260919-s32g_serdes-v3-0-9d68868c1e89@oss.nxp.com> <20260919-s32g_serdes-v3-6-9d68868c1e89@oss.nxp.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Date: Sun, 20 Sep 2026 06:54:56 +0000 Message-Id: <20260920065456.99D951F000FF@smtp.kernel.org> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: Thank you for your contribution! Sashiko AI review found 5 potential issue(= s) to consider: - [High] mm: Use-After-Free in s32g_serdes_pcs_create() via lockless drvdat= a access - [High] driver: Race condition exposing PHY provider before hardware initi= alization - [High] pm: Sleep in atomic context via noirq sleep callbacks - [Medium] driver: Infinite probe deferral on unconfigured XPCS instance - [Medium] pm: Missing resource cleanup on resume error path -- commit 179aba95589906304ef5b4ba6f8b771475155fa2 Author: Vincent Guittot phy: freescale: s32g: Add SerDes subsystem PHY The S32G SoC family includes two SerDes subsystems, each made of one PCIe controller, two XPCS and a shared 2-lane combo PHY. The lanes can be configured to carry PCIe and/or SGMII. =20 Add the SerDes subsystem PHY driver: the PCIe PHY, the shared combo-PHY bring-up, and the setup of the XPCS instances added by the previous patch. > diff --git a/drivers/phy/freescale/phy-nxp-s32g-serdes.c b/drivers/phy/fr= eescale/phy-nxp-s32g-serdes.c > new file mode 100644 > index 0000000000000..e81878137f2e1 > --- /dev/null > +++ b/drivers/phy/freescale/phy-nxp-s32g-serdes.c > @@ -0,0 +1,1057 @@ [ ... ] > +static int s32g_serdes_init(struct s32g_serdes *serdes) > +{ > + struct s32g_serdes_ctrl *ctrl =3D &serdes->ctrl; > + u32 reg0; > + int ret; > + > + ret =3D clk_bulk_prepare_enable(ctrl->nclks, ctrl->clks); > + if (ret) { > + dev_err(serdes->dev, "Failed to enable SerDes clocks\n"); > + return ret; > + } [ ... ] > + /* Wait for the selection of working mode (as per the manual specs) */ > + usleep_range(100, 110); [ ... ] > +static int s32g_serdes_create_pcie_phy(struct s32g_serdes *serdes, > + struct device_node *child_node) > +{ > + struct phy_provider *phy_provider; > + struct device *dev =3D serdes->dev; > + struct phy *phy; > + > + phy =3D devm_phy_create(dev, child_node, &serdes_pcie_ops); > + if (IS_ERR(phy)) > + return PTR_ERR(phy); > + > + phy_set_drvdata(phy, serdes); > + > + phy->attrs.mode =3D PHY_MODE_PCIE; > + serdes->pcie.phy =3D phy; > + > + phy_provider =3D devm_of_phy_provider_register(&phy->dev, > + s32g_serdes_phy_xlate); [Severity: High] Does this expose the PHY provider before the hardware is initialized?=20 s32g_serdes_parse_lanes() registers the PHY provider via=20 devm_of_phy_provider_register(), making it visible to consumers. The hardwa= re=20 clocks and resets aren't initialized until s32g_serdes_init() is called lat= er=20 in s32g_serdes_probe().=20 If a consumer probes concurrently and calls phy_power_on(), could it access= =20 unclocked registers and cause a synchronous external abort? > + if (IS_ERR(phy_provider)) > + return PTR_ERR(phy_provider); > + > + return 0; > +} [ ... ] > +static int s32g_serdes_probe(struct platform_device *pdev) > +{ [ ... ] > + ret =3D s32g_serdes_parse_lanes(dev, serdes); > + if (ret) > + return ret; [ ... ] > + ret =3D s32g_serdes_init(serdes); > + if (ret) > + return ret; [ ... ] > +static int s32g_serdes_resume(struct device *device) > +{ > + struct s32g_serdes *serdes =3D dev_get_drvdata(device); > + struct s32g_pcie_ctrl *pcie =3D &serdes->pcie; > + int ret; > + > + ret =3D s32g_serdes_init(serdes); > + if (ret) { > + dev_err(device, "Failed to initialize\n"); > + return ret; > + } > + > + /* Restore PCIe phy power */ > + if (pcie->powered_on) { > + ret =3D s32g_pcie_phy_power_on(serdes); > + if (ret) > + dev_err(device, "Failed to power-on PCIe phy\n"); > + } > + > + return ret; [Severity: Medium] Does this leak clock resources on the error path? If s32g_pcie_phy_power_on() fails, the function returns an error without=20 undoing the hardware initialization performed earlier in s32g_serdes_init()= .=20 The PM core will mark the device as having failed to resume, but the leaked= =20 clock enables might prevent the power domain from fully shutting down. > +} [ ... ] > +struct phylink_pcs *s32g_serdes_pcs_create(struct device *dev, > + struct device_node *np) > +{ [ ... ] > + serdes =3D platform_get_drvdata(pdev); > + if (!serdes) { > + put_device(&pdev->dev); > + return ERR_PTR(-EPROBE_DEFER); > + } [Severity: High] Can this race with driver unbind leading to a use-after-free? This function is exposed to consumer drivers and reads drvdata locklessly.= =20 If the SerDes driver is unbound concurrently via sysfs,=20 dev_set_drvdata(dev, NULL) is called and the devm_kzalloc'd serdes=20 structure is freed by devres.=20 If platform_get_drvdata() reads the pointer just before the unbind, won't=20 accessing serdes->xpcs.phys[instance] below dereference freed memory? > + > + if (!serdes->xpcs.phys[instance]) { > + put_device(&pdev->dev); > + return ERR_PTR(-EPROBE_DEFER); [Severity: Medium] Will this cause an infinite probe deferral loop if the instance is unconfig= ured? If the SerDes has probed successfully (meaning drvdata is non-NULL) but=20 intentionally did not populate serdes->xpcs.phys[instance] due to lane=20 configuration mismatch, this instance will never be populated. Would it be= =20 better to return an error rather than -EPROBE_DEFER in this case? > + } [ ... ] > +/* noirq, like the PCIe controller using this PHY */ > +static const struct dev_pm_ops s32g_serdes_pm_ops =3D { > + NOIRQ_SYSTEM_SLEEP_PM_OPS(s32g_serdes_suspend, > + s32g_serdes_resume) [Severity: High] Does this call sleepable functions in an atomic context? The driver assigns s32g_serdes_resume() to the .resume_noirq callback, whic= h=20 executes with hardware interrupts disabled. However, s32g_serdes_resume() c= alls=20 s32g_serdes_init(), which invokes clk_bulk_prepare_enable() (takes a mutex)= =20 and usleep_range() (sleeps via hrtimers). > +}; --=20 Sashiko AI review =C2=B7 https://sashiko.dev/#/patchset/20260919-s32g_serde= s-v3-0-9d68868c1e89@oss.nxp.com?part=3D6 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 09733C982D8 for ; Sun, 20 Sep 2026 06:55:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Reply-To:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: References:In-Reply-To:Cc:To:Subject:From:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=aH6GXTX5+EnFqPnfHkF6YxDBPi8fjptM7WP3H19LG8c=; b=HcE+/ApKLwBxMf fmD7zIAIFMpAnP7O2SAM87si6JLfdepLgPpfxri7FBncp1UvRvUV9d8ackCaGG+ufbV9d0Ae4BeXs F7aqs1sgHjB+HHmERuJFvK9mx813PHQWPtrTAwRLHQr3gjmEUPXyT3aIS8d6KlVS9TgNZx7SIn9es yPhuHrly1nKkrvOiQUnXQ7Rfl9zIbreuHwxlNLbA4Vys3XCM8e9YMkbhdBbOoxvaWRQSLtkja+38D Kn/7/R3WFqcvYqvZUqm/NaKE85iQ6KkoovmeVi7glh0Dk52SAS5Ry0Rd70GNngA7KdvTOgKzmZnAw XIWLI83eyL+/b51J3+xg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1x8BS0-0000000H0Sf-2uVG; Sun, 20 Sep 2026 06:55:00 +0000 Received: from tor.source.kernel.org ([2600:3c04:e001:324:0:1991:8:25]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1x8BRy-0000000H0RK-0VPj for linux-phy@lists.infradead.org; Sun, 20 Sep 2026 06:54:58 +0000 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by tor.source.kernel.org (Postfix) with ESMTP id 8F0D260136; Sun, 20 Sep 2026 06:54:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 99D951F000FF; Sun, 20 Sep 2026 06:54:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1789887297; bh=VdUGT7JhdnhiMe+TwqTYeXIrGneg9v/OjTMN8gRSFKk=; h=From:Subject:Reply-To:To:Cc:In-Reply-To:References:Date; b=QbjJltmBK4aVAnSnKOcbH44t9Y18cmtrEZ2qPvTwGJadaieXnlkzqAoB673ZfNNQg syjqE+4WNJDx3ndrYmIm8IFilUpg05QgJ9AzubluKrSMongRy2OXSWrlrsLXGirGRd hWDPYmlegO6KVpCUD82nSTg3+3SR1utpiSVY3T8J902m6QtoUcaZydC6YkacguuT1N kFjxTYa8hZK5gJMxDKo+1dmOb9iJbLcmH4/RWnRjMcGHald4oRrLJLiTvpSYxIyefK 9z+oQz8bUPdaw6EDO6M3ZObfZctBGijWXEZAzoJVqe9YhEiDOk8179PTtbzDl63Knd U9Md1Pvd2w18A== From: sashiko-bot@kernel.org Subject: Re: [PATCH RFC v3 06/12] phy: freescale: s32g: Add SerDes subsystem PHY To: =?utf-8?b?SmFuIFBldHJvdXMgKE9TUyk=?= Cc: linux-pci@vger.kernel.org, vkoul@kernel.org, neil.armstrong@linaro.org, olteanv@gmail.com, linux-phy@lists.infradead.org, Frank.Li@kernel.org, conor+dt@kernel.org, wsa+renesas@sang-engineering.com, robh@kernel.org, imx@lists.linux.dev, devicetree@vger.kernel.org In-Reply-To: <20260919-s32g_serdes-v3-6-9d68868c1e89@oss.nxp.com> References: <20260919-s32g_serdes-v3-0-9d68868c1e89@oss.nxp.com> <20260919-s32g_serdes-v3-6-9d68868c1e89@oss.nxp.com> Date: Sun, 20 Sep 2026 06:54:56 +0000 Message-Id: <20260920065456.99D951F000FF@smtp.kernel.org> X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: sashiko-reviews@lists.linux.dev MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org VGhhbmsgeW91IGZvciB5b3VyIGNvbnRyaWJ1dGlvbiEgU2FzaGlrbyBBSSByZXZpZXcgZm91bmQg NSBwb3RlbnRpYWwgaXNzdWUocykgdG8gY29uc2lkZXI6Ci0gW0hpZ2hdIG1tOiBVc2UtQWZ0ZXIt RnJlZSBpbiBzMzJnX3NlcmRlc19wY3NfY3JlYXRlKCkgdmlhIGxvY2tsZXNzIGRydmRhdGEgYWNj ZXNzCi0gW0hpZ2hdIGRyaXZlcjogUmFjZSBjb25kaXRpb24gZXhwb3NpbmcgUEhZIHByb3ZpZGVy IGJlZm9yZSBoYXJkd2FyZSBpbml0aWFsaXphdGlvbgotIFtIaWdoXSBwbTogU2xlZXAgaW4gYXRv bWljIGNvbnRleHQgdmlhIG5vaXJxIHNsZWVwIGNhbGxiYWNrcwotIFtNZWRpdW1dIGRyaXZlcjog SW5maW5pdGUgcHJvYmUgZGVmZXJyYWwgb24gdW5jb25maWd1cmVkIFhQQ1MgaW5zdGFuY2UKLSBb TWVkaXVtXSBwbTogTWlzc2luZyByZXNvdXJjZSBjbGVhbnVwIG9uIHJlc3VtZSBlcnJvciBwYXRo Ci0tCgpjb21taXQgMTc5YWJhOTU1ODk5MDYzMDRlZjViNGJhNmY4Yjc3MTQ3NTE1NWZhMgpBdXRo b3I6IFZpbmNlbnQgR3VpdHRvdCA8dmluY2VudC5ndWl0dG90QGxpbmFyby5vcmc+CgogICAgcGh5 OiBmcmVlc2NhbGU6IHMzMmc6IEFkZCBTZXJEZXMgc3Vic3lzdGVtIFBIWQoKICAgIFRoZSBTMzJH IFNvQyBmYW1pbHkgaW5jbHVkZXMgdHdvIFNlckRlcyBzdWJzeXN0ZW1zLCBlYWNoIG1hZGUgb2Yg b25lCiAgICBQQ0llIGNvbnRyb2xsZXIsIHR3byBYUENTIGFuZCBhIHNoYXJlZCAyLWxhbmUgY29t Ym8gUEhZLiBUaGUgbGFuZXMgY2FuCiAgICBiZSBjb25maWd1cmVkIHRvIGNhcnJ5IFBDSWUgYW5k L29yIFNHTUlJLgogICAgCiAgICBBZGQgdGhlIFNlckRlcyBzdWJzeXN0ZW0gUEhZIGRyaXZlcjog dGhlIFBDSWUgUEhZLCB0aGUgc2hhcmVkIGNvbWJvLVBIWQogICAgYnJpbmctdXAsIGFuZCB0aGUg c2V0dXAgb2YgdGhlIFhQQ1MgaW5zdGFuY2VzIGFkZGVkIGJ5IHRoZSBwcmV2aW91cwogICAgcGF0 Y2guCgo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL3BoeS9mcmVlc2NhbGUvcGh5LW54cC1zMzJnLXNl cmRlcy5jIGIvZHJpdmVycy9waHkvZnJlZXNjYWxlL3BoeS1ueHAtczMyZy1zZXJkZXMuYwo+IG5l dyBmaWxlIG1vZGUgMTAwNjQ0Cj4gaW5kZXggMDAwMDAwMDAwMDAwMC4uZTgxODc4MTM3ZjJlMQo+ IC0tLSAvZGV2L251bGwKPiArKysgYi9kcml2ZXJzL3BoeS9mcmVlc2NhbGUvcGh5LW54cC1zMzJn LXNlcmRlcy5jCj4gQEAgLTAsMCArMSwxMDU3IEBACgpbIC4uLiBdCgo+ICtzdGF0aWMgaW50IHMz Mmdfc2VyZGVzX2luaXQoc3RydWN0IHMzMmdfc2VyZGVzICpzZXJkZXMpCj4gK3sKPiArCXN0cnVj dCBzMzJnX3NlcmRlc19jdHJsICpjdHJsID0gJnNlcmRlcy0+Y3RybDsKPiArCXUzMiByZWcwOwo+ ICsJaW50IHJldDsKPiArCj4gKwlyZXQgPSBjbGtfYnVsa19wcmVwYXJlX2VuYWJsZShjdHJsLT5u Y2xrcywgY3RybC0+Y2xrcyk7Cj4gKwlpZiAocmV0KSB7Cj4gKwkJZGV2X2VycihzZXJkZXMtPmRl diwgIkZhaWxlZCB0byBlbmFibGUgU2VyRGVzIGNsb2Nrc1xuIik7Cj4gKwkJcmV0dXJuIHJldDsK PiArCX0KClsgLi4uIF0KCj4gKwkvKiBXYWl0IGZvciB0aGUgc2VsZWN0aW9uIG9mIHdvcmtpbmcg bW9kZSAoYXMgcGVyIHRoZSBtYW51YWwgc3BlY3MpICovCj4gKwl1c2xlZXBfcmFuZ2UoMTAwLCAx MTApOwoKWyAuLi4gXQoKPiArc3RhdGljIGludCBzMzJnX3NlcmRlc19jcmVhdGVfcGNpZV9waHko c3RydWN0IHMzMmdfc2VyZGVzICpzZXJkZXMsCj4gKwkJCQkgICAgICAgc3RydWN0IGRldmljZV9u b2RlICpjaGlsZF9ub2RlKQo+ICt7Cj4gKwlzdHJ1Y3QgcGh5X3Byb3ZpZGVyICpwaHlfcHJvdmlk ZXI7Cj4gKwlzdHJ1Y3QgZGV2aWNlICpkZXYgPSBzZXJkZXMtPmRldjsKPiArCXN0cnVjdCBwaHkg KnBoeTsKPiArCj4gKwlwaHkgPSBkZXZtX3BoeV9jcmVhdGUoZGV2LCBjaGlsZF9ub2RlLCAmc2Vy ZGVzX3BjaWVfb3BzKTsKPiArCWlmIChJU19FUlIocGh5KSkKPiArCQlyZXR1cm4gUFRSX0VSUihw aHkpOwo+ICsKPiArCXBoeV9zZXRfZHJ2ZGF0YShwaHksIHNlcmRlcyk7Cj4gKwo+ICsJcGh5LT5h dHRycy5tb2RlID0gUEhZX01PREVfUENJRTsKPiArCXNlcmRlcy0+cGNpZS5waHkgPSBwaHk7Cj4g Kwo+ICsJcGh5X3Byb3ZpZGVyID0gZGV2bV9vZl9waHlfcHJvdmlkZXJfcmVnaXN0ZXIoJnBoeS0+ ZGV2LAo+ICsJCQkJCQkgICAgIHMzMmdfc2VyZGVzX3BoeV94bGF0ZSk7CgpbU2V2ZXJpdHk6IEhp Z2hdCkRvZXMgdGhpcyBleHBvc2UgdGhlIFBIWSBwcm92aWRlciBiZWZvcmUgdGhlIGhhcmR3YXJl IGlzIGluaXRpYWxpemVkPyAKCnMzMmdfc2VyZGVzX3BhcnNlX2xhbmVzKCkgcmVnaXN0ZXJzIHRo ZSBQSFkgcHJvdmlkZXIgdmlhIApkZXZtX29mX3BoeV9wcm92aWRlcl9yZWdpc3RlcigpLCBtYWtp bmcgaXQgdmlzaWJsZSB0byBjb25zdW1lcnMuIFRoZSBoYXJkd2FyZSAKY2xvY2tzIGFuZCByZXNl dHMgYXJlbid0IGluaXRpYWxpemVkIHVudGlsIHMzMmdfc2VyZGVzX2luaXQoKSBpcyBjYWxsZWQg bGF0ZXIgCmluIHMzMmdfc2VyZGVzX3Byb2JlKCkuIAoKSWYgYSBjb25zdW1lciBwcm9iZXMgY29u Y3VycmVudGx5IGFuZCBjYWxscyBwaHlfcG93ZXJfb24oKSwgY291bGQgaXQgYWNjZXNzIAp1bmNs b2NrZWQgcmVnaXN0ZXJzIGFuZCBjYXVzZSBhIHN5bmNocm9ub3VzIGV4dGVybmFsIGFib3J0PwoK PiArCWlmIChJU19FUlIocGh5X3Byb3ZpZGVyKSkKPiArCQlyZXR1cm4gUFRSX0VSUihwaHlfcHJv dmlkZXIpOwo+ICsKPiArCXJldHVybiAwOwo+ICt9CgpbIC4uLiBdCgo+ICtzdGF0aWMgaW50IHMz Mmdfc2VyZGVzX3Byb2JlKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYpCj4gK3sKClsgLi4u IF0KCj4gKwlyZXQgPSBzMzJnX3NlcmRlc19wYXJzZV9sYW5lcyhkZXYsIHNlcmRlcyk7Cj4gKwlp ZiAocmV0KQo+ICsJCXJldHVybiByZXQ7CgpbIC4uLiBdCgo+ICsJcmV0ID0gczMyZ19zZXJkZXNf aW5pdChzZXJkZXMpOwo+ICsJaWYgKHJldCkKPiArCQlyZXR1cm4gcmV0OwoKWyAuLi4gXQoKPiAr c3RhdGljIGludCBzMzJnX3NlcmRlc19yZXN1bWUoc3RydWN0IGRldmljZSAqZGV2aWNlKQo+ICt7 Cj4gKwlzdHJ1Y3QgczMyZ19zZXJkZXMgKnNlcmRlcyA9IGRldl9nZXRfZHJ2ZGF0YShkZXZpY2Up Owo+ICsJc3RydWN0IHMzMmdfcGNpZV9jdHJsICpwY2llID0gJnNlcmRlcy0+cGNpZTsKPiArCWlu dCByZXQ7Cj4gKwo+ICsJcmV0ID0gczMyZ19zZXJkZXNfaW5pdChzZXJkZXMpOwo+ICsJaWYgKHJl dCkgewo+ICsJCWRldl9lcnIoZGV2aWNlLCAiRmFpbGVkIHRvIGluaXRpYWxpemVcbiIpOwo+ICsJ CXJldHVybiByZXQ7Cj4gKwl9Cj4gKwo+ICsJLyogUmVzdG9yZSBQQ0llIHBoeSBwb3dlciAqLwo+ ICsJaWYgKHBjaWUtPnBvd2VyZWRfb24pIHsKPiArCQlyZXQgPSBzMzJnX3BjaWVfcGh5X3Bvd2Vy X29uKHNlcmRlcyk7Cj4gKwkJaWYgKHJldCkKPiArCQkJZGV2X2VycihkZXZpY2UsICJGYWlsZWQg dG8gcG93ZXItb24gUENJZSBwaHlcbiIpOwo+ICsJfQo+ICsKPiArCXJldHVybiByZXQ7CgpbU2V2 ZXJpdHk6IE1lZGl1bV0KRG9lcyB0aGlzIGxlYWsgY2xvY2sgcmVzb3VyY2VzIG9uIHRoZSBlcnJv ciBwYXRoPwoKSWYgczMyZ19wY2llX3BoeV9wb3dlcl9vbigpIGZhaWxzLCB0aGUgZnVuY3Rpb24g cmV0dXJucyBhbiBlcnJvciB3aXRob3V0IAp1bmRvaW5nIHRoZSBoYXJkd2FyZSBpbml0aWFsaXph dGlvbiBwZXJmb3JtZWQgZWFybGllciBpbiBzMzJnX3NlcmRlc19pbml0KCkuIApUaGUgUE0gY29y ZSB3aWxsIG1hcmsgdGhlIGRldmljZSBhcyBoYXZpbmcgZmFpbGVkIHRvIHJlc3VtZSwgYnV0IHRo ZSBsZWFrZWQgCmNsb2NrIGVuYWJsZXMgbWlnaHQgcHJldmVudCB0aGUgcG93ZXIgZG9tYWluIGZy b20gZnVsbHkgc2h1dHRpbmcgZG93bi4KCj4gK30KClsgLi4uIF0KCj4gK3N0cnVjdCBwaHlsaW5r X3BjcyAqczMyZ19zZXJkZXNfcGNzX2NyZWF0ZShzdHJ1Y3QgZGV2aWNlICpkZXYsCj4gKwkJCQkJ ICAgc3RydWN0IGRldmljZV9ub2RlICpucCkKPiArewoKWyAuLi4gXQoKPiArCXNlcmRlcyA9IHBs YXRmb3JtX2dldF9kcnZkYXRhKHBkZXYpOwo+ICsJaWYgKCFzZXJkZXMpIHsKPiArCQlwdXRfZGV2 aWNlKCZwZGV2LT5kZXYpOwo+ICsJCXJldHVybiBFUlJfUFRSKC1FUFJPQkVfREVGRVIpOwo+ICsJ fQoKW1NldmVyaXR5OiBIaWdoXQpDYW4gdGhpcyByYWNlIHdpdGggZHJpdmVyIHVuYmluZCBsZWFk aW5nIHRvIGEgdXNlLWFmdGVyLWZyZWU/CgpUaGlzIGZ1bmN0aW9uIGlzIGV4cG9zZWQgdG8gY29u c3VtZXIgZHJpdmVycyBhbmQgcmVhZHMgZHJ2ZGF0YSBsb2NrbGVzc2x5LiAKSWYgdGhlIFNlckRl cyBkcml2ZXIgaXMgdW5ib3VuZCBjb25jdXJyZW50bHkgdmlhIHN5c2ZzLCAKZGV2X3NldF9kcnZk YXRhKGRldiwgTlVMTCkgaXMgY2FsbGVkIGFuZCB0aGUgZGV2bV9remFsbG9jJ2Qgc2VyZGVzIApz dHJ1Y3R1cmUgaXMgZnJlZWQgYnkgZGV2cmVzLiAKCklmIHBsYXRmb3JtX2dldF9kcnZkYXRhKCkg cmVhZHMgdGhlIHBvaW50ZXIganVzdCBiZWZvcmUgdGhlIHVuYmluZCwgd29uJ3QgCmFjY2Vzc2lu ZyBzZXJkZXMtPnhwY3MucGh5c1tpbnN0YW5jZV0gYmVsb3cgZGVyZWZlcmVuY2UgZnJlZWQgbWVt b3J5PwoKPiArCj4gKwlpZiAoIXNlcmRlcy0+eHBjcy5waHlzW2luc3RhbmNlXSkgewo+ICsJCXB1 dF9kZXZpY2UoJnBkZXYtPmRldik7Cj4gKwkJcmV0dXJuIEVSUl9QVFIoLUVQUk9CRV9ERUZFUik7 CgpbU2V2ZXJpdHk6IE1lZGl1bV0KV2lsbCB0aGlzIGNhdXNlIGFuIGluZmluaXRlIHByb2JlIGRl ZmVycmFsIGxvb3AgaWYgdGhlIGluc3RhbmNlIGlzIHVuY29uZmlndXJlZD8KCklmIHRoZSBTZXJE ZXMgaGFzIHByb2JlZCBzdWNjZXNzZnVsbHkgKG1lYW5pbmcgZHJ2ZGF0YSBpcyBub24tTlVMTCkg YnV0IAppbnRlbnRpb25hbGx5IGRpZCBub3QgcG9wdWxhdGUgc2VyZGVzLT54cGNzLnBoeXNbaW5z dGFuY2VdIGR1ZSB0byBsYW5lIApjb25maWd1cmF0aW9uIG1pc21hdGNoLCB0aGlzIGluc3RhbmNl IHdpbGwgbmV2ZXIgYmUgcG9wdWxhdGVkLiBXb3VsZCBpdCBiZSAKYmV0dGVyIHRvIHJldHVybiBh biBlcnJvciByYXRoZXIgdGhhbiAtRVBST0JFX0RFRkVSIGluIHRoaXMgY2FzZT8KCj4gKwl9Cgpb IC4uLiBdCgo+ICsvKiBub2lycSwgbGlrZSB0aGUgUENJZSBjb250cm9sbGVyIHVzaW5nIHRoaXMg UEhZICovCj4gK3N0YXRpYyBjb25zdCBzdHJ1Y3QgZGV2X3BtX29wcyBzMzJnX3NlcmRlc19wbV9v cHMgPSB7Cj4gKwlOT0lSUV9TWVNURU1fU0xFRVBfUE1fT1BTKHMzMmdfc2VyZGVzX3N1c3BlbmQs Cj4gKwkJCQkgIHMzMmdfc2VyZGVzX3Jlc3VtZSkKCltTZXZlcml0eTogSGlnaF0KRG9lcyB0aGlz IGNhbGwgc2xlZXBhYmxlIGZ1bmN0aW9ucyBpbiBhbiBhdG9taWMgY29udGV4dD8KClRoZSBkcml2 ZXIgYXNzaWducyBzMzJnX3NlcmRlc19yZXN1bWUoKSB0byB0aGUgLnJlc3VtZV9ub2lycSBjYWxs YmFjaywgd2hpY2ggCmV4ZWN1dGVzIHdpdGggaGFyZHdhcmUgaW50ZXJydXB0cyBkaXNhYmxlZC4g SG93ZXZlciwgczMyZ19zZXJkZXNfcmVzdW1lKCkgY2FsbHMgCnMzMmdfc2VyZGVzX2luaXQoKSwg d2hpY2ggaW52b2tlcyBjbGtfYnVsa19wcmVwYXJlX2VuYWJsZSgpICh0YWtlcyBhIG11dGV4KSAK YW5kIHVzbGVlcF9yYW5nZSgpIChzbGVlcHMgdmlhIGhydGltZXJzKS4KCj4gK307CgotLSAKU2Fz aGlrbyBBSSByZXZpZXcgwrcgaHR0cHM6Ly9zYXNoaWtvLmRldi8jL3BhdGNoc2V0LzIwMjYwOTE5 LXMzMmdfc2VyZGVzLXYzLTAtOWQ2ODg2OGMxZTg5QG9zcy5ueHAuY29tP3BhcnQ9NgoKLS0gCmxp bnV4LXBoeSBtYWlsaW5nIGxpc3QKbGludXgtcGh5QGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cHM6 Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtcGh5Cg==