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envelope-from=farman@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Harald Freudenberger Support the subfunctions CPACF_KM_PXTS_128 and CPACF_KM_PXTS_256 for the cpacf km instruction. Signed-off-by: Harald Freudenberger Tested-by: Holger Dengler Reviewed-by: Ilya Leoshkevich Link: https://lore.kernel.org/qemu-devel/20260824083204.40877-19-freude@linux.ibm.com Signed-off-by: Eric Farman --- target/s390x/gen-features.c | 2 + target/s390x/tcg/cpacf.h | 4 ++ target/s390x/tcg/cpacf_aes.c | 105 +++++++++++++++++++++++++++++++ target/s390x/tcg/crypto_helper.c | 6 ++ 4 files changed, 117 insertions(+) diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c index 1ed0d4efeb..aa489e0d9c 100644 --- a/target/s390x/gen-features.c +++ b/target/s390x/gen-features.c @@ -937,6 +937,8 @@ static uint16_t qemu_MAX[] = { S390_FEAT_KM_EAES_256, S390_FEAT_KM_XTS_AES_128, S390_FEAT_KM_XTS_AES_256, + S390_FEAT_KM_XTS_EAES_128, + S390_FEAT_KM_XTS_EAES_256, S390_FEAT_KMC_AES_128, S390_FEAT_KMC_AES_192, S390_FEAT_KMC_AES_256, diff --git a/target/s390x/tcg/cpacf.h b/target/s390x/tcg/cpacf.h index f0c2e7fb6c..550a6ee183 100644 --- a/target/s390x/tcg/cpacf.h +++ b/target/s390x/tcg/cpacf.h @@ -55,5 +55,9 @@ int cpacf_paes_ctr(CPUS390XState *env, const int mmu_idx, uintptr_t ra, uint8_t fc, uint8_t mod); int cpacf_paes_pcc(CPUS390XState *env, const int mmu_idx, uintptr_t ra, uint64_t param_addr, uint8_t fc); +int cpacf_paes_xts(CPUS390XState *env, const int mmu_idx, uintptr_t ra, + uint64_t param_addr, uint64_t *dst_ptr_reg, + uint64_t *src_ptr_reg, uint64_t *src_len_reg, + uint32_t type, uint8_t fc, uint8_t mod); #endif /* S390X_CPACF_H */ diff --git a/target/s390x/tcg/cpacf_aes.c b/target/s390x/tcg/cpacf_aes.c index dbbe5bda64..92884c4120 100644 --- a/target/s390x/tcg/cpacf_aes.c +++ b/target/s390x/tcg/cpacf_aes.c @@ -879,3 +879,108 @@ int cpacf_paes_pcc(CPUS390XState *env, const int mmu_idx, uintptr_t ra, return 0; } + +int cpacf_paes_xts(CPUS390XState *env, const int mmu_idx, uintptr_t ra, + uint64_t param_addr, uint64_t *dst_ptr_reg, + uint64_t *src_ptr_reg, uint64_t *src_len_reg, + uint32_t type, uint8_t fc, uint8_t mod) +{ + enum { MAX_BLOCKS_PER_RUN = 8192 / AES_BLOCK_SIZE }; + uint8_t in[AES_BLOCK_SIZE], out[AES_BLOCK_SIZE]; + uint8_t key[32], wkvp[32], tweak[AES_BLOCK_SIZE]; + uint64_t len = *src_len_reg, done = 0; + int i, keysize, addr_reg_size; + AES_KEY exkey; + + g_assert(type == S390_FEAT_TYPE_KM); + + switch (fc) { + case CPACF_KM_PXTS_128: + keysize = 16; + break; + case CPACF_KM_PXTS_256: + keysize = 32; + break; + default: + g_assert_not_reached(); + } + + /* check addressing mode, raise exception if not supported here */ + addr_reg_size = get_address_bitsize(env); + switch (addr_reg_size) { + case 64: + break; + case 32: + len = (uint32_t)len; + break; + default: + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); + } + + /* early bail out if length is zero */ + if (!len) { + return 0; + } + + /* length has to be properly aligned. */ + if (!QEMU_IS_ALIGNED(len, AES_BLOCK_SIZE)) { + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); + } + + /* fetch and check wkvp from param block */ + read_guest_wrap_u8(env, mmu_idx, ra, + param_addr + keysize, wkvp, sizeof(wkvp)); + if (memcmp(wkvp, protkey_wkvp, sizeof(wkvp))) { + /* wkvp mismatch -> return with cc 1 */ + return 1; + } + + /* fetch protected key from param block */ + read_guest_wrap_u8(env, mmu_idx, ra, param_addr, key, keysize); + /* decrypt the protected key */ + decrypt_protkey(key, keysize); + + /* expand key */ + if (mod) { + AES_set_decrypt_key(key, keysize * 8, &exkey); + } else { + AES_set_encrypt_key(key, keysize * 8, &exkey); + } + + /* fetch tweak from param block */ + read_guest_wrap_u8(env, mmu_idx, ra, + param_addr + keysize + sizeof(wkvp), + tweak, AES_BLOCK_SIZE); + + /* process up to MAX_BLOCKS_PER_RUN aes blocks */ + for (i = 0; i < MAX_BLOCKS_PER_RUN && len >= AES_BLOCK_SIZE; i++) { + /* fetch one AES block into in */ + aes_read_block(env, mmu_idx, ra, *src_ptr_reg + done, in); + if (mod) { + /* decrypt in => out */ + AES_xts_decrypt(in, out, tweak, &exkey); + } else { + /* encrypt in => out */ + AES_xts_encrypt(in, out, tweak, &exkey); + } + /* prep tweak for next round */ + AES_xts_prep_next_tweak(tweak); + /* write out this processed block from out */ + aes_write_block(env, mmu_idx, ra, *dst_ptr_reg + done, out); + len -= AES_BLOCK_SIZE; + done += AES_BLOCK_SIZE; + } + + /* update tweak in param block */ + write_guest_wrap_u8(env, mmu_idx, ra, + param_addr + keysize + sizeof(wkvp), + tweak, AES_BLOCK_SIZE); + + *src_ptr_reg = deposit64(*src_ptr_reg, 0, addr_reg_size, + *src_ptr_reg + done); + *dst_ptr_reg = deposit64(*dst_ptr_reg, 0, addr_reg_size, + *dst_ptr_reg + done); + *src_len_reg -= done; + + return !len ? 0 : 3; +} diff --git a/target/s390x/tcg/crypto_helper.c b/target/s390x/tcg/crypto_helper.c index 886f9c72d6..1014f1d954 100644 --- a/target/s390x/tcg/crypto_helper.c +++ b/target/s390x/tcg/crypto_helper.c @@ -125,6 +125,12 @@ static int cpacf_km(CPUS390XState *env, const int mmu_idx, uintptr_t ra, &env->regs[r1], &env->regs[r2], &env->regs[r2 + 1], S390_FEAT_TYPE_KM, fc, mod); break; + case CPACF_KM_PXTS_128: + case CPACF_KM_PXTS_256: + rc = cpacf_paes_xts(env, mmu_idx, ra, env->regs[1], + &env->regs[r1], &env->regs[r2], &env->regs[r2 + 1], + S390_FEAT_TYPE_KM, fc, mod); + break; default: tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } -- 2.55.0