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[2a02:3100:1c91:bf00:219:99ff:feb2:2458]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49fda0ce29fsm4986905e9.6.2026.09.21.14.47.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Sep 2026 14:47:45 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Phil Dennis-Jordan , Alistair Francis , Peter Maydell , Alexander Graf , Jason Wang , qemu-arm@nongnu.org, Pierrick Bouvier , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Bernhard Beschow , Jean-Christophe Dubois , Gaurav Sharma Subject: [PATCH 14/42] hw/arm/fsl-imx6ul: Derive from TYPE_SYS_BUS_DEVICE Date: Mon, 21 Sep 2026 23:46:42 +0200 Message-ID: <20260921214710.29422-15-shentey@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260921214710.29422-1-shentey@gmail.com> References: <20260921214710.29422-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:31::10; envelope-from=shentey@gmail.com; helo=mail-wm2-x10.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be reset upon machine reset. Signed-off-by: Bernhard Beschow --- include/hw/arm/fsl-imx6ul.h | 5 ++--- hw/arm/fsl-imx6ul.c | 4 +--- hw/arm/mcimx6ul-evk.c | 2 +- 3 files changed, 4 insertions(+), 7 deletions(-) diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h index 6205fe6b77..9ae0488990 100644 --- a/include/hw/arm/fsl-imx6ul.h +++ b/include/hw/arm/fsl-imx6ul.h @@ -18,6 +18,7 @@ #define FSL_IMX6UL_H #include "hw/cpu/a15mpcore.h" +#include "hw/core/sysbus.h" #include "hw/misc/imx6ul_ccm.h" #include "hw/misc/imx6_src.h" #include "hw/misc/imx7_snvs.h" @@ -64,10 +65,8 @@ enum FslIMX6ULConfiguration { }; struct FslIMX6ULState { - /*< private >*/ - DeviceState parent_obj; + SysBusDevice parent_obj; - /*< public >*/ ARMCPU cpu; A15MPPrivState a7mpcore; IMXGPTState gpt[FSL_IMX6UL_NUM_GPTS]; diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c index 1863558a0d..84451c9909 100644 --- a/hw/arm/fsl-imx6ul.c +++ b/hw/arm/fsl-imx6ul.c @@ -730,13 +730,11 @@ static void fsl_imx6ul_class_init(ObjectClass *oc, const void *data) device_class_set_props(dc, fsl_imx6ul_properties); dc->realize = fsl_imx6ul_realize; dc->desc = "i.MX6UL SOC"; - /* Reason: Uses serial_hds and nd_table in realize() directly */ - dc->user_creatable = false; } static const TypeInfo fsl_imx6ul_type_info = { .name = TYPE_FSL_IMX6UL, - .parent = TYPE_DEVICE, + .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(FslIMX6ULState), .instance_init = fsl_imx6ul_init, .class_init = fsl_imx6ul_class_init, diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c index 4964cb9345..53d221b4a9 100644 --- a/hw/arm/mcimx6ul-evk.c +++ b/hw/arm/mcimx6ul-evk.c @@ -44,7 +44,7 @@ static void mcimx6ul_evk_init(MachineState *machine) object_property_set_uint(OBJECT(s), "fec2-phy-num", 1, &error_fatal); object_property_set_bool(OBJECT(s), "fec1-phy-connected", false, &error_fatal); - qdev_realize(DEVICE(s), NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal); memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_MMDC_ADDR, machine->ram); -- 2.55.0