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[2a02:3100:1c91:bf00:219:99ff:feb2:2458]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49fda0ce29fsm4986905e9.6.2026.09.21.14.47.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Sep 2026 14:47:49 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Phil Dennis-Jordan , Alistair Francis , Peter Maydell , Alexander Graf , Jason Wang , qemu-arm@nongnu.org, Pierrick Bouvier , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Bernhard Beschow , Jean-Christophe Dubois , Gaurav Sharma , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 17/42] hw/timer/imx_epit: Wire clock control module via link property Date: Mon, 21 Sep 2026 23:46:45 +0200 Message-ID: <20260921214710.29422-18-shentey@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260921214710.29422-1-shentey@gmail.com> References: <20260921214710.29422-1-shentey@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:31::11; envelope-from=shentey@gmail.com; helo=mail-wm2-x11.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org When wiring struct IMXEPITState to the clock control module, it is currently necessary to reach into its private data. Moreover, when forgetting to wire the clock control module, QEMU will crash after the guest has already started. Fix both by letting struct IMXEPITState expose a link property which is checked at realize time. Inspired-by: Philippe Mathieu-Daudé Signed-off-by: Bernhard Beschow --- hw/arm/fsl-imx25.c | 3 ++- hw/arm/fsl-imx31.c | 3 ++- hw/arm/fsl-imx6.c | 3 ++- hw/arm/fsl-imx6ul.c | 3 ++- hw/timer/imx_epit.c | 14 ++++++++++++++ 5 files changed, 22 insertions(+), 4 deletions(-) diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c index 0840c2d86a..a8745d5d1a 100644 --- a/hw/arm/fsl-imx25.c +++ b/hw/arm/fsl-imx25.c @@ -160,7 +160,8 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) { FSL_IMX25_EPIT2_ADDR, FSL_IMX25_EPIT2_IRQ } }; - s->epit[i].ccm = IMX_CCM(&s->ccm); + object_property_set_link(OBJECT(&s->epit[i]), "clock-control-module", + OBJECT(&s->ccm), &error_abort); if (!sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), errp)) { return; diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c index b440ad6e28..79e2f7f795 100644 --- a/hw/arm/fsl-imx31.c +++ b/hw/arm/fsl-imx31.c @@ -126,7 +126,8 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) { FSL_IMX31_EPIT2_ADDR, FSL_IMX31_EPIT2_IRQ }, }; - s->epit[i].ccm = IMX_CCM(&s->ccm); + object_property_set_link(OBJECT(&s->epit[i]), "clock-control-module", + OBJECT(&s->ccm), &error_abort); if (!sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), errp)) { return; diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 22deb72496..5bb828fbb6 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -225,7 +225,8 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) { FSL_IMX6_EPIT2_ADDR, FSL_IMX6_EPIT2_IRQ }, }; - s->epit[i].ccm = IMX_CCM(&s->ccm); + object_property_set_link(OBJECT(&s->epit[i]), "clock-control-module", + OBJECT(&s->ccm), &error_abort); if (!sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), errp)) { return; diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c index 2786889bda..f72121e23d 100644 --- a/hw/arm/fsl-imx6ul.c +++ b/hw/arm/fsl-imx6ul.c @@ -270,7 +270,8 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) FSL_IMX6UL_EPIT2_IRQ, }; - s->epit[i].ccm = IMX_CCM(&s->ccm); + object_property_set_link(OBJECT(&s->epit[i]), "clock-control-module", + OBJECT(&s->ccm), &error_abort); sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->epit[i]), 0, diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c index 374ec7d324..e1050b51d8 100644 --- a/hw/timer/imx_epit.c +++ b/hw/timer/imx_epit.c @@ -17,7 +17,9 @@ #include "hw/timer/imx_epit.h" #include "migration/vmstate.h" #include "hw/core/irq.h" +#include "hw/core/qdev-properties.h" #include "hw/misc/imx_ccm.h" +#include "qapi/error.h" #include "qemu/module.h" #include "qemu/log.h" #include "trace.h" @@ -386,6 +388,12 @@ static void imx_epit_realize(DeviceState *dev, Error **errp) IMXEPITState *s = IMX_EPIT(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + if (!s->ccm) { + error_setg(errp, "%s 'clock-control-module' link property not set", + dev->canonical_path); + return; + } + sysbus_init_irq(sbd, &s->irq); memory_region_init_io(&s->iomem, OBJECT(s), &imx_epit_ops, s, TYPE_IMX_EPIT, 0x00001000); @@ -412,12 +420,18 @@ static void imx_epit_dev_reset(DeviceState *dev) imx_epit_reset(s, true); } +static const Property imx_timer_epit_properties[] = { + DEFINE_PROP_LINK("clock-control-module", IMXEPITState, ccm, TYPE_IMX_CCM, + IMXCCMState *), +}; + static void imx_epit_class_init(ObjectClass *klass, const void *data) { DeviceClass *dc = DEVICE_CLASS(klass); dc->realize = imx_epit_realize; device_class_set_legacy_reset(dc, imx_epit_dev_reset); + device_class_set_props(dc, imx_timer_epit_properties); dc->vmsd = &vmstate_imx_timer_epit; dc->desc = "i.MX periodic timer"; } -- 2.55.0