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[2a02:3100:1c91:bf00:219:99ff:feb2:2458]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49fda0ce29fsm4986905e9.6.2026.09.21.14.48.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Sep 2026 14:48:16 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Phil Dennis-Jordan , Alistair Francis , Peter Maydell , Alexander Graf , Jason Wang , qemu-arm@nongnu.org, Pierrick Bouvier , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Bernhard Beschow , Jean-Christophe Dubois , Gaurav Sharma Subject: [PATCH 38/42] hw/misc/imx*_ccm: Avoid casting from void * Date: Mon, 21 Sep 2026 23:47:06 +0200 Message-ID: <20260921214710.29422-39-shentey@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260921214710.29422-1-shentey@gmail.com> References: <20260921214710.29422-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:30::d; envelope-from=shentey@gmail.com; helo=mail-wr2-x0d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Signed-off-by: Bernhard Beschow --- hw/misc/imx25_ccm.c | 4 ++-- hw/misc/imx31_ccm.c | 4 ++-- hw/misc/imx6_ccm.c | 8 ++++---- hw/misc/imx6ul_ccm.c | 8 ++++---- hw/misc/imx7_src.c | 4 ++-- 5 files changed, 14 insertions(+), 14 deletions(-) diff --git a/hw/misc/imx25_ccm.c b/hw/misc/imx25_ccm.c index a91b0be682..8fd2a329dd 100644 --- a/hw/misc/imx25_ccm.c +++ b/hw/misc/imx25_ccm.c @@ -217,7 +217,7 @@ static void imx25_ccm_reset(DeviceState *dev) static uint64_t imx25_ccm_read(void *opaque, hwaddr offset, unsigned size) { uint32_t value = 0; - IMX25CCMState *s = (IMX25CCMState *)opaque; + IMX25CCMState *s = opaque; if (offset < 0x70) { value = s->reg[offset >> 2]; @@ -234,7 +234,7 @@ static uint64_t imx25_ccm_read(void *opaque, hwaddr offset, unsigned size) static void imx25_ccm_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { - IMX25CCMState *s = (IMX25CCMState *)opaque; + IMX25CCMState *s = opaque; trace_imx25_ccm_write(imx25_ccm_reg_name(offset >> 2), value); diff --git a/hw/misc/imx31_ccm.c b/hw/misc/imx31_ccm.c index 8d620711dd..3cb9f44fab 100644 --- a/hw/misc/imx31_ccm.c +++ b/hw/misc/imx31_ccm.c @@ -222,7 +222,7 @@ static void imx31_ccm_reset(DeviceState *dev) static uint64_t imx31_ccm_read(void *opaque, hwaddr offset, unsigned size) { uint32_t value = 0; - IMX31CCMState *s = (IMX31CCMState *)opaque; + IMX31CCMState *s = opaque; if ((offset >> 2) < IMX31_CCM_MAX_REG) { value = s->reg[offset >> 2]; @@ -239,7 +239,7 @@ static uint64_t imx31_ccm_read(void *opaque, hwaddr offset, unsigned size) static void imx31_ccm_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { - IMX31CCMState *s = (IMX31CCMState *)opaque; + IMX31CCMState *s = opaque; trace_imx31_ccm_write(imx31_ccm_reg_name(offset >> 2), value); diff --git a/hw/misc/imx6_ccm.c b/hw/misc/imx6_ccm.c index 45fdd0d5a8..4a40fe08ea 100644 --- a/hw/misc/imx6_ccm.c +++ b/hw/misc/imx6_ccm.c @@ -491,7 +491,7 @@ static uint64_t imx6_ccm_read(void *opaque, hwaddr offset, unsigned size) { uint32_t value = 0; uint32_t index = offset >> 2; - IMX6CCMState *s = (IMX6CCMState *)opaque; + IMX6CCMState *s = opaque; value = s->ccm[index]; @@ -504,7 +504,7 @@ static void imx6_ccm_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { uint32_t index = offset >> 2; - IMX6CCMState *s = (IMX6CCMState *)opaque; + IMX6CCMState *s = opaque; trace_imx6_ccm_write(imx6_ccm_reg_name(index), (uint32_t)value); @@ -519,7 +519,7 @@ static uint64_t imx6_analog_read(void *opaque, hwaddr offset, unsigned size) { uint32_t value; uint32_t index = offset >> 2; - IMX6CCMState *s = (IMX6CCMState *)opaque; + IMX6CCMState *s = opaque; switch (index) { case CCM_ANALOG_PLL_ARM_SET: @@ -611,7 +611,7 @@ static void imx6_analog_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { uint32_t index = offset >> 2; - IMX6CCMState *s = (IMX6CCMState *)opaque; + IMX6CCMState *s = opaque; trace_imx6_analog_write(imx6_analog_reg_name(index), (uint32_t)value); diff --git a/hw/misc/imx6ul_ccm.c b/hw/misc/imx6ul_ccm.c index c4f6e372fe..f12ba6ebe2 100644 --- a/hw/misc/imx6ul_ccm.c +++ b/hw/misc/imx6ul_ccm.c @@ -625,7 +625,7 @@ static uint64_t imx6ul_ccm_read(void *opaque, hwaddr offset, unsigned size) { uint32_t value = 0; uint32_t index = offset >> 2; - IMX6ULCCMState *s = (IMX6ULCCMState *)opaque; + IMX6ULCCMState *s = opaque; assert(index < CCM_MAX); @@ -640,7 +640,7 @@ static void imx6ul_ccm_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { uint32_t index = offset >> 2; - IMX6ULCCMState *s = (IMX6ULCCMState *)opaque; + IMX6ULCCMState *s = opaque; assert(index < CCM_MAX); @@ -654,7 +654,7 @@ static uint64_t imx6ul_analog_read(void *opaque, hwaddr offset, unsigned size) { uint32_t value; uint32_t index = offset >> 2; - IMX6ULCCMState *s = (IMX6ULCCMState *)opaque; + IMX6ULCCMState *s = opaque; assert(index < CCM_ANALOG_MAX); @@ -754,7 +754,7 @@ static void imx6ul_analog_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { uint32_t index = offset >> 2; - IMX6ULCCMState *s = (IMX6ULCCMState *)opaque; + IMX6ULCCMState *s = opaque; assert(index < CCM_ANALOG_MAX); diff --git a/hw/misc/imx7_src.c b/hw/misc/imx7_src.c index 77f13bd020..4a59e347c5 100644 --- a/hw/misc/imx7_src.c +++ b/hw/misc/imx7_src.c @@ -105,7 +105,7 @@ static void imx7_src_reset(DeviceState *dev) static uint64_t imx7_src_read(void *opaque, hwaddr offset, unsigned size) { uint32_t value = 0; - IMX7SRCState *s = (IMX7SRCState *)opaque; + IMX7SRCState *s = opaque; uint32_t index = offset >> 2; if (index < SRC_MAX) { @@ -167,7 +167,7 @@ static void imx7_defer_clear_reset_bit(uint32_t cpuid, static void imx7_src_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { - IMX7SRCState *s = (IMX7SRCState *)opaque; + IMX7SRCState *s = opaque; uint32_t index = offset >> 2; long unsigned int change_mask; uint32_t current_value = value; -- 2.55.0