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[2a02:3100:1c91:bf00:219:99ff:feb2:2458]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49fda0ce29fsm4986905e9.6.2026.09.21.14.48.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Sep 2026 14:48:20 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Phil Dennis-Jordan , Alistair Francis , Peter Maydell , Alexander Graf , Jason Wang , qemu-arm@nongnu.org, Pierrick Bouvier , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Bernhard Beschow , Jean-Christophe Dubois , Gaurav Sharma Subject: [PATCH 41/42] hw/net/lan9118_phy: Trace with QOM path Date: Mon, 21 Sep 2026 23:47:09 +0200 Message-ID: <20260921214710.29422-42-shentey@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260921214710.29422-1-shentey@gmail.com> References: <20260921214710.29422-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:31::11; envelope-from=shentey@gmail.com; helo=mail-wm2-x11.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Some i.MX SoCs have multiple i.MX network IP blocks which in QEMU use the LAN9118 Phy. Allow to distinguish them via their QOM path when tracing. Signed-off-by: Bernhard Beschow --- hw/net/lan9118_phy.c | 10 +++++----- hw/net/trace-events | 9 +++++---- 2 files changed, 10 insertions(+), 9 deletions(-) diff --git a/hw/net/lan9118_phy.c b/hw/net/lan9118_phy.c index 2fc027d112..ee87a51241 100644 --- a/hw/net/lan9118_phy.c +++ b/hw/net/lan9118_phy.c @@ -85,14 +85,14 @@ uint16_t lan9118_phy_read(Lan9118PhyState *s, int reg) break; } - trace_lan9118_phy_read(val, reg); + trace_lan9118_phy_read(DEVICE(s)->canonical_path, val, reg); return val; } void lan9118_phy_write(Lan9118PhyState *s, int reg, uint16_t val) { - trace_lan9118_phy_write(val, reg); + trace_lan9118_phy_write(DEVICE(s)->canonical_path, val, reg); switch (reg) { case MII_BMCR: @@ -138,11 +138,11 @@ void lan9118_phy_update_link(Lan9118PhyState *s, bool link_down) /* Autonegotiation status mirrors link status. */ if (link_down) { - trace_lan9118_phy_update_link("down"); + trace_lan9118_phy_link_down(DEVICE(s)->canonical_path); s->status &= ~(MII_BMSR_AN_COMP | MII_BMSR_LINK_ST); s->ints |= PHY_INT_DOWN; } else { - trace_lan9118_phy_update_link("up"); + trace_lan9118_phy_link_up(DEVICE(s)->canonical_path); s->status |= MII_BMSR_AN_COMP | MII_BMSR_LINK_ST; s->ints |= PHY_INT_ENERGYON; s->ints |= PHY_INT_AUTONEG_COMPLETE; @@ -152,7 +152,7 @@ void lan9118_phy_update_link(Lan9118PhyState *s, bool link_down) void lan9118_phy_reset(Lan9118PhyState *s) { - trace_lan9118_phy_reset(); + trace_lan9118_phy_reset(DEVICE(s)->canonical_path); s->control = MII_BMCR_AUTOEN | MII_BMCR_SPEED100; s->status = MII_BMSR_100TX_FD diff --git a/hw/net/trace-events b/hw/net/trace-events index 81af808044..839a612d35 100644 --- a/hw/net/trace-events +++ b/hw/net/trace-events @@ -11,10 +11,11 @@ allwinner_sun8i_emac_read(uint64_t offset, uint64_t val) "MMIO read: offset=0x%" allwinner_sun8i_emac_write(uint64_t offset, uint64_t val) "MMIO write: offset=0x%" PRIx64 " value=0x%" PRIx64 # lan9118_phy.c -lan9118_phy_read(uint16_t val, int reg) "[0x%02x] -> 0x%04" PRIx16 -lan9118_phy_write(uint16_t val, int reg) "[0x%02x] <- 0x%04" PRIx16 -lan9118_phy_update_link(const char *s) "%s" -lan9118_phy_reset(void) "" +lan9118_phy_read(const char *path, uint16_t val, int reg) "%s: [0x%02x] -> 0x%04" PRIx16 +lan9118_phy_write(const char *path, uint16_t val, int reg) "%s: [0x%02x] <- 0x%04" PRIx16 +lan9118_phy_link_down(const char *path) "%s" +lan9118_phy_link_up(const char *path) "%s" +lan9118_phy_reset(const char *path) "%s" # lance.c lance_mem_readw(uint64_t addr, uint32_t ret) "addr=0x%"PRIx64"val=0x%04x" -- 2.55.0