Re: [PATCH 11/11] arm64: dts: qcom: sdm670-google: configure analog and digital codecs

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] dts: qcom: audio bit clock disguised as AHB interconnect clock
--

commit 31dd52373e653175568a580df559d7dd64860174
Author: Richard Acayan <mailingradian@gmail.com>

arm64: dts: qcom: sdm670-google: configure analog and digital codecs

The SDM660 digital and PM660L analog audio codecs control the headphone
jack on the Pixel 3a. Configure them for sound playback.

> diff --git a/arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi b/arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi
> index 3abde2cbf7462..48aea5d72092c 100644
> --- a/arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi
> @@ -53,6 +53,14 @@ framebuffer: framebuffer@9c000000 {
>  		};
>  	};
>  
> +	clocks {
> +		int_cdc_bclk: int-cdc-bclk {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <1536000>;
> +		};
> +	};
> +

[ ... ]

> @@ -568,6 +617,17 @@ rmi4_f12: rmi4-f12@12 {
>  	};
>  };
>  
> +&lpass_codec {
> +	clocks = <&int_cdc_bclk>,
> +		 <&q6afecc LPASS_CLK_ID_INT_MCLK_0 LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
> +	clock-names = "ahbix-clk", "mclk";

[Severity: Medium]
Is it semantically correct to model an AHB bus clock as an audio bit clock?

The msm8916-wcd-digital codec driver requests an AHB interconnect clock
("ahbix-clk") for its register space. This patch maps that requirement to
int_cdc_bclk, which is configured above as a 1.536MHz fixed clock (which
corresponds exactly to a 48kHz audio BCLK).

While this allows the driver to probe successfully because a dummy fixed-clock
returns 0 on clk_prepare_enable(), it misrepresents the hardware layout.

If the true AHB clock is abstracted, always-on, or managed elsewhere, shouldn't
it be mapped to the board's XO or a generic system clock rather than a fake bit
clock?

> +
> +	assigned-clocks = <&q6afecc LPASS_CLK_ID_INT_MCLK_0 LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
> +	assigned-clock-rates = <9600000>;
> +
> +	status = "okay";
> +};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260922015801.32373-1-mailingradian@gmail.com?part=11