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From: Fuad Tabba <fuad.tabba@linux.dev>
To: maz@kernel.org, oupton@kernel.org, kvmarm@lists.linux.dev,
	linux-arm-kernel@lists.infradead.org
Cc: catalin.marinas@arm.com, will@kernel.org, joey.gouly@arm.com,
	seiden@linux.ibm.com, suzuki.poulose@arm.com,
	yuzenghui@huawei.com, mark.rutland@arm.com,
	vdonnefort@google.com, qperret@google.com,
	Sascha.Bischoff@arm.com, steven.price@arm.com
Subject: Re: [PATCH 6/7] KVM: arm64: vgic: Do not access the GICv5 CPU interface from EL1
Date: Tue, 22 Sep 2026 08:38:37 +0100	[thread overview]
Message-ID: <20260922073837.705872-1-fuad.tabba@linux.dev> (raw)
In-Reply-To: <20260915123846.2317931-7-fuad.tabba@linux.dev>

Hi,

On Tue, 15 Sep 2026 13:38:45 +0100, Fuad Tabba <fuad.tabba@linux.dev> wrote:
> can_access_vgic_from_kernel() excludes only the GICv3 system register
> interface, so on a native GICv5 system without FEAT_GCIE_LEGACY it
> returns true under nVHE. The kernel then saves and restores the CPU
> interface from EL1, where ICH_VMCR_EL2 and the ICH_PPI_* registers are
> UNDEFINED, and the nVHE world switch already does that work at EL2.

FWIW, I've since run this on the FVP GICv5 model (support_virtualization=1, kvm-arm.mode=nvhe). On kvmarm/next at 23ddf997ab16b the vgic_v5 selftest oopses the host at the first KVM_RUN:

  Internal error: Oops - Undefined instruction: 0000000002000000 [#1]  SMP
  pc : __vgic_v5_restore_ppi_state+0x10/0x9c
  lr : vgic_v5_restore_state+0x28/0x3c
  Code: d503245f a941240a d0012448 91160108 (d51cca0a)

d51cca0a is the ICH_PPI_DVIR0_EL2 write, from EL1. With this patch applied the same run passes.

Cheers,
/fuad

  reply	other threads:[~2026-09-22  7:38 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-15 12:38 [PATCH 0/7] KVM: arm64: pKVM host hypercall and GICv5 CPU interface fixes Fuad Tabba
2026-09-15 12:38 ` [PATCH 1/7] KVM: arm64: Reject the GICv5 CPU interface hypercalls under pKVM Fuad Tabba
2026-09-15 14:02   ` Marc Zyngier
2026-09-15 14:12     ` Fuad Tabba
2026-09-15 12:38 ` [PATCH 2/7] KVM: arm64: Reject the stage-2 flush " Fuad Tabba
2026-09-15 12:38 ` [PATCH 3/7] KVM: arm64: Validate the host-provided vgic model in pKVM Fuad Tabba
2026-09-16 11:00   ` Joey Gouly
2026-09-16 11:30     ` Fuad Tabba
2026-09-15 12:38 ` [PATCH 4/7] KVM: arm64: Validate the host vCPU's VM before reading it under pKVM Fuad Tabba
2026-09-15 12:38 ` [PATCH 5/7] KVM: arm64: Pin the host vCPU before adjusting its PC " Fuad Tabba
2026-09-15 12:38 ` [PATCH 6/7] KVM: arm64: vgic: Do not access the GICv5 CPU interface from EL1 Fuad Tabba
2026-09-22  7:38   ` Fuad Tabba [this message]
2026-09-15 12:38 ` [PATCH 7/7] KVM: arm64: Fix stale VGICv3 comments in the nVHE world switch Fuad Tabba

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