All of lore.kernel.org
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "Shawn Guo" <shengchao.guo@oss.qualcomm.com>
Cc: robh@kernel.org, devicetree@vger.kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: nord: Add bwmon node for Nord
Date: Tue, 22 Sep 2026 08:13:42 +0000	[thread overview]
Message-ID: <20260922081342.9BEB71F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260922080416.484280-1-shengchao.guo@oss.qualcomm.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] dts: qcom: missing status disabled on incomplete bwmon nodes
--

commit 2b4a55863dba14f87c025537e56ccb0a5f410f20
Author: Pushpendra Singh <pussin@qti.qualcomm.com>

arm64: dts: qcom: nord: Add bwmon node for Nord

Add BWMON nodes and associated OPP tables to enable dynamic DDR/LLCC
frequency scaling.

> diff --git a/arch/arm64/boot/dts/qcom/nord.dtsi b/arch/arm64/boot/dts/qcom/nord.dtsi
> index e0496fd40c308..9925e770dfa46 100644
> --- a/arch/arm64/boot/dts/qcom/nord.dtsi
> +++ b/arch/arm64/boot/dts/qcom/nord.dtsi
[ ... ]
> @@ -1460,6 +1460,73 @@ uart13: serial@a98000 {
>  			};
>  		};
>  
> +		bwmon_cluster2: pmu@1014400 {
> +			reg = <0x0 0x01014400 0x0 0x600>;
> +			interrupts = <GIC_SPI 739 IRQ_TYPE_LEVEL_HIGH>;
> +			operating-points-v2 = <&bwmon_cluster_opp_table>;
> +		};

[Severity: Low]
Should this bwmon_cluster2 node include a status = "disabled" property?

Because this base node in arch/arm64/boot/dts/qcom/nord.dtsi is introduced
without a compatible property, it is enabled by default. Any board including
nord.dtsi without fully configuring this node will instantiate an incomplete
platform device and trigger dtbs_check schema validation errors.

> +
> +		bwmon_cluster1: pmu@1015400 {
> +			reg = <0x0 0x01015400 0x0 0x600>;
> +			interrupts = <GIC_SPI 812 IRQ_TYPE_LEVEL_HIGH>;
> +			operating-points-v2 = <&bwmon_cluster_opp_table>;
> +		};

[Severity: Low]
Does this bwmon_cluster1 node also need to be disabled by default for the
same reason?

> +
> +		bwmon_cluster0: pmu@1016400 {
> +			reg = <0x0 0x01016400 0x0 0x600>;
> +			interrupts = <GIC_SPI 813 IRQ_TYPE_LEVEL_HIGH>;
> +
> +			operating-points-v2 = <&bwmon_cluster_opp_table>;

[Severity: Low]
And similarly for this bwmon_cluster0 node, should it have status = "disabled"
to prevent incomplete instantiation when the variant-specific compatible
string is missing?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260922080416.484280-1-shengchao.guo@oss.qualcomm.com?part=1

  reply	other threads:[~2026-09-22  8:13 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-22  8:04 [PATCH] arm64: dts: qcom: nord: Add bwmon node for Nord Shawn Guo
2026-09-22  8:13 ` sashiko-bot [this message]
2026-09-22  8:26 ` Bartosz Golaszewski
2026-09-22 10:32 ` Konrad Dybcio
2026-09-22 14:56   ` Zhangfei Gao

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260922081342.9BEB71F000FF@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=robh@kernel.org \
    --cc=sashiko-reviews@lists.linux.dev \
    --cc=shengchao.guo@oss.qualcomm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.