From: sashiko-bot@kernel.org
To: "Antonin Malzieu Ridolfi" <dev@nanonej.com>
Cc: "Danilo Krummrich" <dakr@kernel.org>,
"Alexandre Courbot" <acourbot@nvidia.com>,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v2 1/4] gpu: nova-core: Extract PFSP register definitions
Date: Wed, 23 Sep 2026 00:45:31 +0000 [thread overview]
Message-ID: <20260923004532.76D871F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260923-b4-extract-pfsp-registers-to-falcon-mod-v2-1-74600fc068c4@nanonej.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] nova-core: PFSP registers remain pub(crate) despite commit message
- [Low] nova-core: sentence fragment in commit message
--
commit 4db1b123b08a2ccc218c14e49151c182aa9d6c36
Author: Antonin Malzieu Ridolfi <dev@nanonej.com>
gpu: nova-core: Extract PFSP register definitions
This commit moves the Foundation Security Processor (PFSP) register
definitions from the root regs module into the falcon module. It also
re-exports PFALCON registers to allow using a single regs:: prefix.
> Since PFALCON registers are defined in the root regs.rs but are
> also part of the falcon interface, accessed by the whole falcon
> module. They are re-exported in falcon/regs.rs so falcon code can use
> a single regs:: prefix.
[Severity: Low]
This isn't a bug, but there is a sentence fragment in the commit message here.
The first sentence begins with the subordinating conjunction "Since" but
terminates with a period before reaching a main clause. Should these two
sentences be combined?
> diff --git a/drivers/gpu/nova-core/falcon/regs.rs b/drivers/gpu/nova-core/falcon/regs.rs
> new file mode 100644
> index 0000000000000..5ccb10946ec4d
> --- /dev/null
> +++ b/drivers/gpu/nova-core/falcon/regs.rs
> @@ -0,0 +1,42 @@
> +// SPDX-License-Identifier: GPL-2.0
> +
> +use crate::driver::NovaRegisters;
> +use kernel::io::register;
> +
> +// FSP (Foundation Security Processor) queue registers for Hopper/Blackwell Chain of Trust.
> +// These registers manage falcon EMEM communication queues.
> +
> +register! {
> + base: NovaRegisters;
> +
> + pub(crate) NV_PFSP_QUEUE_HEAD(u32)[8] @ 0x008f2c00 {
[Severity: Medium]
The commit message states that visibility for these moved registers changes
to pub(super), but the code retains pub(crate) visibility here and for the
other NV_PFSP_* registers below. Should this be updated to pub(super) as
intended?
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260923-b4-extract-pfsp-registers-to-falcon-mod-v2-0-74600fc068c4@nanonej.com?part=1
next prev parent reply other threads:[~2026-09-23 0:45 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-23 0:41 [PATCH v2 0/4] gpu: nova-core: Extract falcon registers Antonin Malzieu Ridolfi via B4 Relay
2026-09-23 0:41 ` Antonin Malzieu Ridolfi
2026-09-23 0:41 ` [PATCH v2 1/4] gpu: nova-core: Extract PFSP register definitions Antonin Malzieu Ridolfi via B4 Relay
2026-09-23 0:41 ` Antonin Malzieu Ridolfi
2026-09-23 0:45 ` sashiko-bot [this message]
2026-09-23 0:55 ` Nanonej Dev
2026-09-23 0:41 ` [PATCH v2 2/4] gpu: nova-core: falcon: Extract PRISCV register Antonin Malzieu Ridolfi via B4 Relay
2026-09-23 0:41 ` Antonin Malzieu Ridolfi
2026-09-23 0:41 ` [PATCH v2 3/4] gpu: nova-core: falcon: Extract PFALCON2 register Antonin Malzieu Ridolfi via B4 Relay
2026-09-23 0:41 ` Antonin Malzieu Ridolfi
2026-09-23 0:41 ` [PATCH v2 4/4] gpu: nova-core: Extract PFALCON register Antonin Malzieu Ridolfi via B4 Relay
2026-09-23 0:41 ` Antonin Malzieu Ridolfi
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